MC9S08GT32CFDER Freescale Semiconductor, MC9S08GT32CFDER Datasheet - Page 33
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MC9S08GT32CFDER
Manufacturer Part Number
MC9S08GT32CFDER
Description
IC MCU 32K FLASH 2K RAM 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.M68EVB908GB60E.pdf
(290 pages)
Specifications of MC9S08GT32CFDER
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Download datasheet (2Mb)
Chapter 3 Modes of Operation
3.1
The operating modes of the MC9S08GB/GT are described in this section. Entry into each mode, exit from
each mode, and functionality while in each of the modes are described.
3.2
3.3
This is the normal operating mode for the MC9S08GB/GT. This mode is selected when the BKGD/MS
pin is high at the rising edge of reset. In this mode, the CPU executes code from internal memory with
execution beginning at the address fetched from memory at $FFFE:$FFFF after reset.
3.4
The active background mode functions are managed through the background debug controller (BDC) in
the HCS08 core. The BDC, together with the on-chip debug module (DBG), provide the means for
analyzing MCU operation during software development.
Active background mode is entered in any of five ways:
After entering active background mode, the CPU is held in a suspended state waiting for serial background
commands rather than executing instructions from the user’s application program.
Freescale Semiconductor
•
•
•
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Active background mode for code development
Wait mode:
— CPU shuts down to conserve power
— System clocks running
— Full voltage regulation maintained
Stop modes:
— System clocks stopped; voltage regulator in standby
— Stop1 — Full power down of internal circuits for maximum power savings
— Stop2 — Partial power down of internal circuits, RAM contents retained
— Stop3 — All internal circuits powered for fast recovery
When the BKGD/MS pin is low at the rising edge of reset
When a BACKGROUND command is received through the BKGD pin
When a BGND instruction is executed
When encountering a BDC breakpoint
When encountering a DBG breakpoint
Introduction
Features
Run Mode
Active Background Mode
MC9S08GB/GT Data Sheet, Rev. 2.3
33
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