XC705B32CFNE Freescale Semiconductor, XC705B32CFNE Datasheet - Page 13

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XC705B32CFNE

Manufacturer Part Number
XC705B32CFNE
Description
IC MCU 2.1MHZ 32K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of XC705B32CFNE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
528 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC705B32CFNE
Manufacturer:
SILICON
Quantity:
101
Part Number:
XC705B32CFNE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Paragraph
Number
MC68HC05B6
Rev. 4.1
10.1
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.2
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.2.6
10.3
10.3.1
10.3.2
10.3.3
10.3.4
10.3.5
10.3.6
10.3.7
10.3.8
10.3.9
10.3.10
11.1
11.2
11.2.1
11.2.2
11.3
11.4
12.1
12.1.1
12.1.2
Registers .........................................................................................................10–1
Instruction set ..................................................................................................10–3
Addressing modes .........................................................................................10–11
Absolute maximum ratings ..............................................................................11–1
DC electrical characteristics ............................................................................11–2
A/D converter characteristics...........................................................................11–8
Control timing ................................................................................................11–10
MC68HC05B family pin configurations ............................................................12–1
Accumulator (A) .........................................................................................10–2
Index register (X)........................................................................................10–2
Program counter (PC) ................................................................................10–2
Stack pointer (SP) ......................................................................................10–2
Condition code register (CCR)...................................................................10–2
Register/memory Instructions ....................................................................10–4
Branch instructions ....................................................................................10–4
Bit manipulation instructions ......................................................................10–4
Read/modify/write instructions ...................................................................10–4
Control instructions ....................................................................................10–4
Tables.........................................................................................................10–4
Inherent....................................................................................................10–11
Immediate ................................................................................................10–11
Direct........................................................................................................10–11
Extended..................................................................................................10–12
Indexed, no offset.....................................................................................10–12
Indexed, 8-bit offset..................................................................................10–12
Indexed, 16-bit offset................................................................................10–12
Relative ....................................................................................................10–13
Bit set/clear ..............................................................................................10–13
Bit test and branch ...................................................................................10–13
I
I
52-pin plastic leaded chip carrier (PLCC) ..................................................12–1
64-pin quad flat pack (QFP) .......................................................................12–2
DD
DD
trends for 5V operation ........................................................................11–3
trends for 3.3V operation .....................................................................11–6
CPU CORE AND INSTRUCTION SET
ELECTRICAL SPECIFICATIONS
TABLE OF CONTENTS
TABLE OF CONTENTS
MECHANICAL DATA
10
11
12
Freescale
Number
Page
v

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