XC705B32CFNE Freescale Semiconductor, XC705B32CFNE Datasheet - Page 175

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XC705B32CFNE

Manufacturer Part Number
XC705B32CFNE
Description
IC MCU 2.1MHZ 32K OTP 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of XC705B32CFNE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
528 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC705B32CFNE
Manufacturer:
SILICON
Quantity:
101
Part Number:
XC705B32CFNE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
C.5.3
The serial routine communicates through the SCI with an external host, typically a PC, by means
of an RS232 link at 9600 baud, 8-bit, no parity and full duplex.
Data format is not ASCII, but 8-bit binary, so a complementary program must be run by the host
to supply the required format. Such a program is available for the IBM PC from Freescale.
The EPROM bootstrap routines are used to customise the OTP EPROM. To increase the speed
of programming, four bytes are programmed in parallel while the data is simultaneously
transmitted and received in full duplex. This implies that while 4 bytes are being programmed, the
next 4 bytes are received and the preceding 4 bytes are echoed. The format accepted by the serial
loader is as follows:
Address n must have the two LSBs at zero so that n, n+1, n+2 and n+3 have identical MSBs.
These blocks of four bytes do not need to be contiguous, as a new address is transmitted for each
new group.
The protocol is as follows:
After reset, the MC68HC705B5 serial bootstrap routine will first echo two blocks of four bytes at
$0000, as no data is programmed yet.
If the data sent in is $00, no programming in the EPROM takes place, and the contents of the
accessed location are returned as a prompt. The entire EPROM memory can be read in this
fashion (serial dump). The red LED will be on if the data read from the EPROM is not $00.
Serial RAM loading and execute can be accomplished in this mode. A RAM byte will be written if
the address sent by the host in the serial protocol points to the RAM.
In the RAM bootloader mode, all interrupt vectors are mapped to pseudo-vectors in RAM (see
Table
pseudo-vector is allowed three bytes of space rather than the two bytes for normal vectors,
because an explicit jump (JMP) opcode is needed to cause the desired jump to the user’s
service-routine address.
MC68HC05B6
Rev. 4.1
C-3). This allows programmers to use their own service-routine addresses. Each
1 The MC68HC705B5 sends the last two bytes programmed to the host as a
1) In response to the first byte prompt, the host sends the first address byte.
2) After receiving the first address byte, the MC68HC705B5 sends the next
3) The exchange of data continues until the MC68HC705B5 has sent the four
4) If the data is non zero, it is programmed at the address provided, while the
5) Loop to 1.
[address n high] [address n low] [data(n)] [data (n+1)] [data (n+2)] [data (n+3)]
prompt; this allows verification by the host of proper programming.
byte programmed.
data bytes and the host has sent the 2 address data bytes and 4 data bytes.
next address and bytes are received and the previous data is echoed.
EPROM (RAM) serial bootstrap load and execute
MC68HC705B5
Freescale
C-13
14

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