LTC6404IUD-2#PBF Linear Technology, LTC6404IUD-2#PBF Datasheet - Page 9

• Manufacturer Part Number: LTC6404IUD-2#PBF
• Description: IC AMP/DRIVER DIFF 16-QFN
• Manufacturer: Linear Technology
• Type: ADC Driverr

Specifications of LTC6404IUD-2#PBF

• Applications: Data Acquisition
• Mounting Type: Surface Mount
• Package / Case: 16-WQFN Exposed Pad
• Current - Supply: 30.4mA
• Operating Temperature: -40°C ~ 85°C
• Output Type: Differential, Rail-to-Rail
• Number Of Circuits: 1
• Current - Output / Channel: 85mA
• Amplifier Type: Differential
• Voltage - Supply, Single/dual (±): 2.7 V ~ 5.5 V, ±1.35 V ~ 2.75 V
• -3db Bandwidth: 600MHz
• Slew Rate: 700 V/µs
• Gain Bandwidth Product: 900MHz
• Current - Input Bias: 23µA
• Voltage - Input Offset: 500µV
• Number Of Channels: 1
• Number Of Elements: 1
• Power Supply Requirement: Single
• Common Mode Rejection Ratio: 60dB
• Voltage Gain Db: 90dB
• Unity Gain Bandwidth Product (typ): 900MHz
• Input Resistance: 1@3V@-40C TO 85CMohm
• Single Supply Voltage (typ): 3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Rejection Ratio: 60dB
• Rail/rail I/o Type: Rail to Rail Output
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.25V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: QFN EP
• No. Of Amplifiers: 1
• Input Offset Voltage: 2mV
• Gain Db Max: 2dB
• Bandwidth: 900MHz
• Supply Voltage Range: 2.7V To 5.25V
• Supply Current: 30.4mA
• Amplifier Case Style: QFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN FUNCTIONS
pin has an input resistance of approximately 14k to a
mid-supply potential. The V
with a high quality ceramic bypass capacitor of at least
0.01μF , (with symmetrical split supplies, connect directly
to a low impedance, low noise ground plane) to minimize
common mode noise from being converted to differential
noise by impedance mismatches both externally and
internally to the IC.
NC (Pins 5, 16): No Connection. These pins are not con-
nected internally.
OUT
driving the feedback network, each pin can drive an ad-
ditional 50Ω to ground with typical short circuit current
limiting of ±65mA. Each amplifi er output is designed to
drive a load capacitance of 10pF . This basically means
the amplifi er can drive 10pF from each output to ground
or 5pF differentially. Larger capacitive loads should be
decoupled with at least 25Ω resistors in series with each
output. For long term device reliability, it is recommended
that the continuous (DC + AC
to under ±50mA.
BLOCK DIAGRAM
+
, OUT
–
(Pins 7, 14): Unfi ltered Output Pins. Besides
1
2
3
4
SHDN
V
V
V
+
–
OCM
RMS
OCM
V
V
+
–
) output current be limited
V
V
V
V
pin should be bypassed
+
–
+
–
V
+
66k
28k
28k
16
5
V
V
+
–
NC
NC
V
V
–
–
15
6
IN
IN
+
–
V
+
–
OCM
V
V
–
–
V
V
OUTF
pins have a series 50Ω resistor connected between the
fi ltered and unfi ltered outputs and three 12pF capacitors.
Both OUTF
tional 12pF differentially between OUTF
fi lter creates a differential low pass frequency response
with a –3dB bandwidth of 88.5MHz. For long term device
reliability, it is recommended that the continuous (DC +
AC
IN
pins of the amplifi er, respectively. For best performance,
it is highly recommended that stray capacitance be
kept to an absolute minimum by keeping printed circuit
connections as short as possible, and if necessary,
stripping back nearby surrounding ground plane away
from these pins.
Exposed Pad (Pin 17): Tie the pad to V
If split supplies are used, do not tie the pad to ground.
+
+
+
RMS
, IN
14
7
+
OUT
OUT
, OUTF
) output current be limited to under ±40mA.
–
V
V
(Pins 15, 6): Non-Inverting and Inverting Input
–
50Ω
50Ω
+
–
–
V
V
+
+
+
, and OUTF
12pF
–
13
(Pins 8, 13): Filtered Output Pins. These
8
OUTF
OUTF
12pF
12pF
–
+
V
V
V
+
+
–
+
have 12pF to V
V
V
–
–
64042 BD
V
V
V
V
–
+
+
–
12
11
10
9
LTC6404-2
–
(Pins 3, 9, and 12).
+
and OUTF
–
, plus an addi-
–
. This
64042f
9