BU7262SF-E2 Rohm Semiconductor, BU7262SF-E2 Datasheet - Page 11
![OP AMP I/O LV 1.8-5.5V 8-SOP](/photos/6/96/69672/8-sop_sop8_pkg_sml.jpg)
BU7262SF-E2
Manufacturer Part Number
BU7262SF-E2
Description
OP AMP I/O LV 1.8-5.5V 8-SOP
Manufacturer
Rohm Semiconductor
Specifications of BU7262SF-E2
Slew Rate
1.1 V/µs
Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Gain Bandwidth Product
2MHz
Current - Input Bias
1pA
Voltage - Input Offset
1000µV
Current - Supply
550µA
Current - Output / Channel
12mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V, ±0.9 V ~ 2.75 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
8-SOP
Op Amp Type
CMOS
No. Of Amplifiers
2
Bandwidth
2MHz
Supply Voltage Range
± 0.9V To ± 2.75V
Amplifier Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To
Number Of Channels
2
Common Mode Rejection Ratio (min)
45 dB
Input Offset Voltage
9 mV
Input Bias Current (max)
1 pA
Operating Supply Voltage
3 V, 5 V
Supply Current
1.1 mA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Maximum Dual Supply Voltage
+/- 2.75 V
Minimum Dual Supply Voltage
+/- 0.9 V
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Technology
CMOS
Voltage Gain Db
95 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
BU7262SF-E2TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
BU7262SF-E2
Manufacturer:
Rohm
Quantity:
5 995
● Schematic diagram
● Test circuit1 NULL method
- Calculation-
1. Input offset Voltage (Vio)
2. Large signal voltage gain (Av)
3. Common-mode rejection ratio (CMRR)
4. Power supply rejection ratio (PSRR)
Input offset voltage
Large signal voltage gain
Common-mode rejection ratio
(Input common-mode voltage range)
Power supply rejecyion ratio
VDD,VSS,EK,Vicm Unit : [V]
Parameter
Vicm
RS = 50[Ω]
RS = 50[Ω]
50[kΩ]
0.015[µF]
VF1
VF2
VF3
VF4
VF5
VF6
VF7
VF
Ri=1[MΩ]
Ri=1[MΩ]
SW2
SW1
ON
ON
ON
ON
S1
0.015[µF]
ON
ON
ON
ON
S2
Fig.2 Test Circuit 1 (one channel only)
VDD
VSS
DUT
Fig.1 simplified schematic
OFF
OFF
OFF
ON
S3
VRL
SW3
RL
VDD
1.8
5.5
3
3
3
Vo
11/16
Rf=50[kΩ]
VSS
0.1[µF]
EK
0
0
0
0
1000[pF]
500[kΩ]
-1.5
-0.5
-2.5
-1.5
-0.9
500[kΩ]
EK
Vicm
1.5
3
0
3
0
Calculation
NULL
-15[V]
15[V]
1
2
3
4
0.01[µF]
VF