SE5230DR2G ON Semiconductor, SE5230DR2G Datasheet - Page 7

• Manufacturer Part Number: SE5230DR2G
• Description: IC OP AMP LOW VOLTAGE 8-SOIC
• Manufacturer: ON Semiconductor
• Type: General Purpose Amplifierr

Specifications of SE5230DR2G

• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 0.25 V/µs
• Gain Bandwidth Product: 600kHz
• Current - Input Bias: 40nA
• Voltage - Input Offset: 400µV
• Current - Supply: 1.1mA
• Current - Output / Channel: 32mA
• Voltage - Supply, Single/dual (±): 1.8 V ~ 15 V, ±0.9 V ~ 7.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Channels: 1
• Voltage Gain Db: 126.02 dB
• Common Mode Rejection Ratio (min): 85 dB
• Input Offset Voltage: 3 mV
• Operating Supply Voltage: 3 V, 5 V, 9 V, 12 V
• Supply Current: 1.6 mA
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Maximum Dual Supply Voltage: +/- 7.5 V
• Minimum Operating Temperature: - 40 C
• Rail/rail I/o Type: No
• Number Of Elements: 1
• Unity Gain Bandwidth Product: 0.6MHz
• Common Mode Rejection Ratio: 85dB
• Input Bias Current: 150nA
• Single Supply Voltage (typ): 3/5/9/12V
• Dual Supply Voltage (typ): ±3/±5V
• Power Dissipation: 500mW
• Voltage Gain In Db: 126.02dB
• Power Supply Rejection Ratio: 85dB
• Power Supply Requirement: Single/Dual
• Shut Down Feature: No
• Single Supply Voltage (min): 1.8V
• Single Supply Voltage (max): 15V
• Dual Supply Voltage (min): ±0.9V
• Dual Supply Voltage (max): ±7.5V
• Technology: Bipolar
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Details

Output Stage
less than 100 mV of either supply voltage can only be
achieved by a pair of complementary common−emitter
connected transistors. Normally, such a configuration
causes complex feed−forward signal paths that develop by
combining biasing and driving which can be found in
previous low supply voltage designs. The unique output
stage of the NE5230 separates the functions of driving and
biasing, as shown in the simplified schematic of Figure 2 and
has the advantage of a shorter signal path which leads to
increasing the effective bandwidth.
output transistors and the class AB control regulator. The
output transistor Q3 connected with the Darlington
transistors Q4 and Q5 can source up to 10 mA to an output
load. The output of NPN Darlington connected transistors
Q1 and Q2 together are able to sink an output current of
10 mA. Accurate and efficient class AB control is necessary
to insure that none of the output transistors are ever
completely cut off. This is accomplished by the differential
amplifier (formed by Q8 and Q9) which controls the biasing
of the output transistors. The differential amplifier compares
the summed voltages across two diodes, D1 and D2, at the
base of Q8 with the summed voltages across the
base−emitter diodes of the output transistors Q1 and Q3. The
base−emitter voltage of Q3 is converted into a current by Q6
and R6 and reconverted into a voltage across the
base−emitter diode of Q7 and R7. The summed voltage
across the base−emitter diodes of the output transistors Q3
and Q1 is proportional to the logarithm of the product of the
push and pull currents I
Processing output voltage swings that nominally reach to
This output stage consists of two parts: the Darlington
V
V
b5
b2
OP
D1
D2
and I
I
b1
ON
Q8
, respectively. The
I
b2
I
Q9
b4
Figure 2. Output Stage
I
b3
http://onsemi.com
Q6
Q7
R6
R7
7
CM1B
CM1A
combined voltages across diodes D1 and D2 are
proportional to the logarithm of the square of the reference
current I
temperatures of the pairs Q1, D1 and Q3, Q2 are equal, the
relation I
the driving signals from becoming delayed by the biasing
circuit. The output Darlington transistors are directly
accessible for in−phase driving signals on the bases of Q5
and Q2. This is very important for simple high−frequency
compensation. The output transistors can be high−frequency
compensated by Miller capacitors CM1A and CM1B
connected from the collectors to the bases of the output
Darlington transistors.
open−loop gain for applications when the output is driving
a low resistance load. The NE5230 accomplishes this by
inserting an intermediate common−emitter stage between
the input and output stages. The three stages provide a very
large gain, but the op amp now has three natural dominant
poles − one at the output of each common−emitter stage.
Frequency compensation is implemented with a simple
scheme of nested, pole−splitting Miller integrators. The
Miller capacitors CM1A and CM1B are the first part of the
nested structure, and provide compensation for the output
and intermediate stages. A second pair of Miller integrators
provide pole−splitting compensation for the pole from the
input stage and the pole resulting from the compensated
combination of poles from the intermediate and output
stages. The result is a stable, internally−compensated op
amp with a phase margin of 70°.
Separating the functions of biasing and driving prevents
A general−purpose op amp of this type must have enough
Q5
OP
I
b5
B1
× I
. When the diode characteristics and
ON
Q4
− I
B1
Q2
× I
B1
is satisfied.
Q3
Q1
V
V
V
I
OUT
CC
I
ON
EE
OP