MAX16004ATP+ Maxim Integrated Products, MAX16004ATP+ Datasheet - Page 20

• Manufacturer Part Number: MAX16004ATP+
• Description: IC UP SUPERVISOR HEX 20-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Multi-Voltage Supervisorr

Specifications of MAX16004ATP+

• Number Of Voltages Monitored: 6
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 6 Selectable Threshold Combinations
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-TQFN Exposed Pad
• Monitored Voltage: 1.8 V, 2.5 V, 3.3 V, Adjustable
• Undervoltage Threshold: 2.97 V, 2.25 V, 1.62 V, Adjustable
• Overvoltage Threshold: 1.71 V, 2.375 V, 3.135 V, Adjustable
• Output Type: Active Low, Open Drain
• Manual Reset: Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 280 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1 V
• Supply Current (typ): 50 uA
• Maximum Power Dissipation: 1355 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RESET asserts low when any of the monitored voltages
fall below their respective thresholds or MR is asserted.
RESET remains asserted for the reset timeout period
after all monitored voltages exceed their respective
thresholds and MR is deasserted (see Figure 12). This
open-drain output has a 30µA internal pullup. An exter-
nal pullup resistor to any voltage from 0 to 5.5V overrides
the internal pullup if interfacing to different logic supply
voltages. Internal circuitry prevents reverse current flow
from the external pullup voltage to V
Low-Voltage, Quad-/Hex-/Octal-Voltage
µP Supervisors
20
Figure 11. Interfacing to a Different Logic Supply Voltage
______________________________________________________________________________________
RESET Output (MAX16001/MAX16002/
MAX16004–MAX16007
MAX16001/
MAX16002/
V
V
CC
CC
GND
= 3.3V
OUT_
MAX16004–MAX16007)
100kΩ
RESET
CC
(Figure 11).
GND
V
5V
CC
WDO asserts and stays low whenever any of the IN_
inputs fall below their respective thresholds. WDO
deasserts without a timeout delay when all the IN_
inputs rise above their thresholds. When all the IN_
inputs rise above their thresholds, WDO asserts low
whenever the watchdog timer times out. WDO
deasserts after a valid WDI transition or if MR is pulled
low. The watchdog timer begins counting after the reset
timeout period once MR goes high. Pull MARGIN low to
deassert WDO regardless of any other condition. The
watchdog timer continues to run when MARGIN is low
and if a timeout occurs. WDO will assert MR after
MARGIN is deasserted. This open-drain output has a
30µA internal pullup. An external pullup resistor to any
voltage from 0 to 5.5V overrides the internal pullup if
interfacing to different logic supply voltages. Internal cir-
cuitry prevents reverse current flow from the external
pullup voltage to V
Figure 12. Output Timing Diagram
RESET
OUT_
V
IN_
TH_
t
t
RD
D
CC
10%
10%
(Figure 11).
WDO (MAX16005 Only)
t
D
90%
t
RP
V
TH_
90%