MAX16004ATP+ Maxim Integrated Products, MAX16004ATP+ Datasheet - Page 9

• Manufacturer Part Number: MAX16004ATP+
• Description: IC UP SUPERVISOR HEX 20-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Multi-Voltage Supervisorr

Specifications of MAX16004ATP+

• Number Of Voltages Monitored: 6
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 6 Selectable Threshold Combinations
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-TQFN Exposed Pad
• Monitored Voltage: 1.8 V, 2.5 V, 3.3 V, Adjustable
• Undervoltage Threshold: 2.97 V, 2.25 V, 1.62 V, Adjustable
• Overvoltage Threshold: 1.71 V, 2.375 V, 3.135 V, Adjustable
• Output Type: Active Low, Open Drain
• Manual Reset: Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 280 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1 V
• Supply Current (typ): 50 uA
• Maximum Power Dissipation: 1355 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16
—
—
—
—
—
—
—
20
10
11
16
—
—
—
4
PIN
11
12
14
10
—
2
6
9
Pin Description (MAX16003/MAX16004/MAX16005) (continued)
_______________________________________________________________________________________
16
10
12
—
Low-Voltage, Quad-/Hex-/Octal-Voltage
4
9
7
8
RESET
NAME
WDO
TOL
WDI
SRT
REF
MR
EP
Threshold Tolerance Input. Connect TOL to GND to select 5% threshold tolerance.
Connect TOL to V
Watchdog Timer Input.
MAX16004: If WDI remains low or high for longer than the watchdog timeout period,
RESET is asserted and the timer is cleared. The timer also clears whenever a reset is
asserted or a rising or falling edge on WDI is detected. The watchdog timer enters a
startup period that allows 54s for the first transition to occur before a reset. Leave WDI
unconnected to disable the watchdog timer.
MAX16005: If WDI remains low or high for longer than the watchdog timeout period,
WDO is asserted. The timer clears whenever a rising or falling edge on WDI is detected.
Leave WDI unconnected to disable the watchdog timer. The MAX16005 does not have a
startup period.
MAX16004/MAX16005: The WDI open-state detector uses a small 100nA current.
Therefore, do not connect WDI to anything that will source or sink more than 50nA. Note
that the leakage current specification for most three-state drivers exceeds 50nA.
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for
the reset timeout period after MR is deasserted. MR is pulled up to V
resistor.
Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout
period. The reset timeout period can be calculated as follows:
Reset Timeout (s) = 2.06 x 10
(min), connect SRT to V
Active-Low Reset Output. RESET asserts low when any of the monitored voltages falls
below its respective threshold or MR is asserted. RESET remains asserted for the reset
timeout period after all monitored voltages exceed their respective thresholds and MR is
deasserted. This open-drain output has a 30µA internal pullup.
Reference Output. The reference output voltage of 1.23V can source up to 40µA.
Active-Low Watchdog Output. WDO asserts and stays low whenever any of the IN_ inputs
fall below their respective thresholds. WDO deasserts without a timeout delay when all
the IN_ inputs rise above their thresholds. When all the IN_ inputs rise above their
thresholds, WDO asserts low whenever the watchdog timer times out. WDO deasserts
after a valid WDI transition or if MR is pulled low. The watchdog timer begins counting
after the reset timeout period once MR goes high. Pull MARGIN low to deassert WDO.
Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to
provide a low thermal resistance path from the IC junction to the PCB. Do not use as the
electrical connection to GND.
CC
to select 10% threshold tolerance.
CC
.
6
(Ω) x C
SRT
FUNCTION
(F). For the internal timeout period of 140ms
µP Supervisors
CC
through a 20kΩ
9