LCP1521S STMicroelectronics, LCP1521S Datasheet - Page 6

• Manufacturer Part Number: LCP1521S
• Description: IC TVS DUAL PROGRMMBL SLIC 8SOIC
• Manufacturer: STMicroelectronics
• Type: TSPDr

Specifications of LCP1521S

• Technology: Programmable TVS
• Number Of Circuits: 2
• Applications: SLIC
• Package / Case: 8-SOIC (3.9mm Width)
• Hold Current: 150mA
• Gate Trigger Current (max): 5mA
• Gate Trigger Voltage (max): 2.5V
• Package Type: SO
• Peak Repeat Off Current: 5uA
• Peak Surge On-state Current (max): 18A
• Mounting: Surface Mount
• Pin Count: 8
• Operating Temp Range: -55C to 150C
• Operating Temperature Classification: Military
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Voltage - Working: -
• Voltage - Clamping: -
• Lead Free Status / Rohs Status: Compliant

Technical information
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Technical information
Figure 5.
Figure 5.
topology has been developed to protect the new high voltage SLICs. It allows to program the
negative firing threshold while the positive clamping value is fixed at GND.
When a negative surge occurs on one wire (L1 for example) a current IG flows through the
base of the transistor T1 and then injects a current in the gate of the thyristor Th1. Th1 fires
and all the surge current flows through the ground. After the surge when the current flowing
through Th1 becomes less negative than the holding current IH, then Th1 switches off.
When a positive surge occurs on one wire (L1 for example) the diode D1 conducts and the
surge current flows through the ground.
Figure 6.
Figure 6.
The capacitor C is used to speed up the crowbar structure firing during the fast surge edges.
This allows to minimize the dynamical breakover voltage at the SLIC Tip and Ring inputs
during fast strikes. Note that this capacitor is generally present around the SLIC - Vbat pin.
So to be efficient it has to be as close as possible from the LCP152 Gate pin and from the
reference ground track (or plan) (see
The series resitors Rs1 and Rs2 designed in
PTC which are mandatory to withstand the power contact or the power induction tests
line side
shows the classical protection circuit using the LCP152 crowbar concept. This
shows the classical PCB layout used to optimize line protection.
To
LCP152 concept behavior
Example of PCB layout based on LCP152S protection
GND
L 1
L 2
-Vbat
Rs2
Rs1
C
LCP1521S
IG
Gate
Figure
T1
6.). The optimized value for C is 220 nF.
Figure 5.
Th1
TIP
RING
represent the fuse resistors or the
D1
GND
ID1
GND
LCP1521S/LCP152DEE
SLIC side
V
V Tip
Ring
To