AK5388EQP AKM Semiconductor Inc, AK5388EQP Datasheet

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AK5388EQP

Manufacturer Part Number
AK5388EQP
Description
IC ADC AUDIO STER 24BIT 44LQFP
Manufacturer
AKM Semiconductor Inc
Type
ADCr
Datasheets

Specifications of AK5388EQP

Resolution (bits)
24 b
Sampling Rate (per Second)
8k ~ 216k
Data Interface
I²S, Serial
Voltage Supply Source
Analog and Digital
Voltage - Supply
3.3V, 5V
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
974-1035

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AK5388EQP
Manufacturer:
Maxim
Quantity:
32
Part Number:
AK5388EQP
Manufacturer:
AKM Semiconductor Inc
Quantity:
10 000
The AK5388 is a 24bit, 216kHz sampling 4-channel A/D converter for high-end audio systems. The
modulator in the AK5388 uses AKM’s Enhanced Dual Bit architecture, enabling the AK5388 to realize
high accuracy and low cost. The AK5388 achieves 120dB dynamic range and 110dB S/(N+D), and an
optional mono mode extends dynamic range to 123dB. The AK5388’s digital filter features a modified FIR
architecture that minimizes group delay while maintaining excellent linear phase response. So the device
is suitable for professional audio applications including recording, sound reinforcement, effects
processing, sound cards, and high-end A/V receivers. The AK5388 is available in 44pin LQFP package.
MS1096-E-01
VCOM2
VCOM1
LIN1+
LIN1-
RIN1+
RIN1-
LIN2+
LIN2-
RIN2+
RIN2-
VREFP1
Sampling Rate: 8kHz ~ 216kHz
Full Differential Inputs
S/(N+D): 110dB
DR, S/N: 120dB(Mono Mode: 123dB)
Short Delay Digital Filter (GD=12.6/fs)
Digital HPF
Power Supply: 4.75 ~ 5.25V(Analog), 3.0 ~ 3.6V(Digital)
Output format: 24bit MSB justified, I
Cascade TDM I/F: 8ch/48kHz, 4ch/96kHz, 4ch/192kHz
Master & Slave Mode
Overflow Flag
Power Dissipation: 575 mW (@fs=48kHz)
Package: 44pin LQFP
AVDD1
• Passband: 0~21.648kHz (@fs=48kHz)
• Ripple: 0.01dB
• Stopband: 80dB
VREFL1 VREFP2
Voltage Reference
VSS1
ΔΣ
Modulator
ΔΣ
Modulator
ΔΣ
Modulator
ΔΣ
Modulator
AVDD2
GENERAL DESCRIPTION
VSS6
120dB 24-bit 192kHz 4-Channel ADC
VREFL2
FEATURES
DVDD1
Decimation
Decimation
Decimation
Decimation
Filter
Filter
Filter
Filter
- 1 -
OVF
VSS3
PDN
DVDD2
2
S or TDM
CKS0 CKS2
Clock Divider
Interface
Audio
VSS4 VSS5
CKS2
LRCK
BICK
SDTO1
SDTO2
TDMIN
MSN
DIF
TDM0
TDM1
HPF
MONO
MCLK
AK5388
[AK5388]
2009/08

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AK5388EQP Summary of contents

Page 1

The AK5388 is a 24bit, 216kHz sampling 4-channel A/D converter for high-end audio systems. The modulator in the AK5388 uses AKM’s Enhanced Dual Bit architecture, enabling the AK5388 to realize high accuracy and low cost. The AK5388 achieves 120dB dynamic ...

Page 2

Ordering Guide AK5388EQ AKD5388 ■ Pin Layout VREFP2 VREFL IN2+ L IN2- TEST3 R IN1- RIN1 VREFL 1 VREFP1 MS1096-E-01 –10 ~ +70°C 44pin LQFP (0.8mm pitch) Evaluation Board for AK5388 ...

Page 3

No. Pin Name I/O 1 LIN1 LIN1− 3 VSS1 - 4 AVDD1 - 5 TEST1 I 6 VSS2 7 CKS0 I 8 CKS1 I 9 CKS2 I 10 PDN I 11 MSN I 12 MCLK I 13 ...

Page 4

No. Pin Name I/O 29 TEST2 I 30 AVDD2 - 31 VSS6 - 32 RIN2− RIN2 VREFP2 I 35 VREFL2 I 36 VCOM2 O 37 LIN2 LIN2− 39 TEST3 I 40 RIN1− I ...

Page 5

Handling of Unused Pin The unused I/O pins should be processed appropriately as below. Classification LIN1+/−, RIN1+/− Analog LIN2+/−, RIN+/− OVF TEST1 Digital TEST2 TEST3 (VSS1-6=0V; Note 1) Parameter Power Analog Supplies: Analog Digital Digital Output Buffer Input Current, ...

Page 6

RECOMMENDED OPERATING CONDITIONS (VSS1-6=0V; Note 1) Parameter Power Supplies: Analog Analog (Note 4) Digital Voltage Reference “H” voltage Reference (Note 5) “L” voltage reference VREFP1 – VREFL1 VREFP2 – VREFL2 Note 1. All voltages with respect to VSS1-6 pins. Note ...

Page 7

AVDD1/2=5.0V; DVDD1/2=3.3V; VSS1-6=0V; VREFP1=VREFP2=AVDD, VREFL1 = VREFL2 = VSS1-6; fs=48kHz, 96kHz, 192kHz; BICK=64fs; Signal Frequency=1kHz; 24bit Data; Measurement frequency=10Hz ∼ 20kHz 48kHz, 40Hz ∼ 40kHz 96kHz, 40Hz ∼ 40kHz at fs ...

Page 8

AVDD1/2=4.75 ∼ 5.25V; DVDD1/2=3.0 ∼ 3.6V; DFS1 = “L”, DFS0 = “L”) Parameter ADC Digital Filter (Decimation LPF): −0.01dB Passband (Note 9) −0.1dB −3.0dB −6.0dB Stopband Passband Ripple Stopband Attenuation Group Delay (Note Group Delay Distortion ADC Digital Filter ...

Page 9

FILTER CHARACTERISTICS (fs=192kHz) (Ta=25°C; AVDD1/2=4.75 ∼ 5.25V; DVDD1/2=3.0 ∼ 3.6V; DFS1 = “H”, DFS0 = “L”) Parameter ADC Digital Filter (Decimation LPF): 11) −0.08dB Passband (Note −0.1dB −3.0dB −6.0dB Stopband Passband Ripple Stopband Attenuation Group Delay (Note Group Delay Distortion ...

Page 10

AVDD1/2=4.75 ∼ 5.25V; DVDD1/2=3.0 ∼ 3.6V; C Parameter Master Clock Timing Master Clock 128fs: Pulse Width Low Pulse Width High 192fs: Pulse Width Low Pulse Width High 256fs: Pulse Width Low Pulse Width High 384fs: Pulse Width Low Pulse ...

Page 11

Parameter Audio Interface Timing (Slave mode) Normal mode (TDM1=“L”, TDM0=“L”) BICK Period Normal Speed Mode Double , Quad Speed Mode Duty Cycle LRCK Edge to BICK “↑” BICK “↑” to LRCK Edge LRCK to SDTO1/2 (MSB) (Except I BICK “↓” ...

Page 12

Parameter Audio Interface Timing (Master mode) Normal mode (TDM1=“L”, TDM0=“L”) BICK Frequency BICK Duty BICK “↓” to LRCK BICK “↓” to SDTO1/2 TDM256 mode (TDM1=“L”, TDM0=“H”) BICK Frequency BICK Duty BICK “↓” to LRCK BICK “↓” to SDTO1 TDM128 mode ...

Page 13

Timing Diagram 1/fCLK MCLK tCLKH Figure 1. MCLK Timing (TDM0 pin = “L” or “H”) LRCK tLRH Figure 2. LRCK Timing (TDM0 pin = “L” or “H”) BICK tBCKH Duty = tBCKH/tBCK, tBCKL/tBCK Figure 3.BICK Timing (TDM0 pin = ...

Page 14

LRCK tBLR BICK tLRS SDTO Figure 4. Audio Interface Timing (Slave mode, TDM0 pin = “L”) Note: SDTO shows SDTO1 and SDTO2. LRCK tBLR BICK SDTO1 tTDMS TDMIN Figure 5. Audio Interface Timing (Slave mode, TDM0 pin = “H”) MS1096-E-01 ...

Page 15

LRCK tBLR BICK SDTO1 Figure 6. Audio Interface Timing (Slave mode, TDM0 pin = “H”, TDM1 pin = “H”, 8KHz ≤ fs < 108KHz) LRCK tBLR BICK SDTO1 Figure 7. Audio Interface Timing (Slave mode, TDM0 pin = “H”, TDM1 ...

Page 16

LRCK tMBLR BICK SDTO PDN tPD SDTO Note: SDTO shows SDTO1 and SDTO2. MS1096-E-01 tBSD Figure 8. Audio Interface Timing (Master mode) tPDV Figure 9. Power Down & Reset Timing - 16 - [AK5388] 50%DVDD dBCK 50%DVDD 50%DVDD VIH VIL ...

Page 17

System Clock MCLK (128fs/192fs/256fs/384fs/512fs/768fs), BICK (48fs∼) and LRCK (fs) clocks are required in slave mode. The LRCK clock input must be synchronized with MCLK, however the phase is not critical. show the relationship of typical sampling frequency and the ...

Page 18

CKS2 pin CKS1 pin When changing MCLK frequency in master/slave mode, the AK5388 should reset by PDN pin = “L”. (ex. 12.288MHz(@fs=48kHz) at CKS1 ...

Page 19

Mode TDM1 TDM0 0 1 Normal TDM256 TDM128 N Table 5. Audio Interface Formats (N/A: Not available) LRCK ...

Page 20

LRCK (Mode 7) LRCK (Mode5) BICK (256fs) SDTO1 BICK Figure 13. Mode 5/7 Timing (TDM256 mode, I LRCK (Mode 10) LRCK (Mode 8) BICK (128fs) SDTO1 23 22 Figure 14. Mode 8/10 Timing (TDM128 mode, MSB justified) ...

Page 21

Digital High Pass Filter (HPF) The ADC has a digital high pass filter for DC offset cancellation. The HPF is controlled by the HPFE pin. If the HPF setting (ON/OFF) is changed during operation, a click noise occurs due ...

Page 22

Cascade TDM Mode The AK5388 supports cascading two devices in a daisy chain configuration in TDM256 mode. In this mode, SDTO1 pin of device #1 is connected to TDMIN pin of device #2. The SDTO1 pin ...

Page 23

Parameter MCLK “↑” to BICK “↓” BICK “↓” to MCLK“↑” MCLK tMCB B ICK Figure 19. Audio Interface timing (Slave mode, TDM0 Mode MCLK=2 x BICK) MCLK tMCB B ICK Figure 20. Audio Interface Timing (Slave mode, TDM0 Mode MCLK=BICK) ...

Page 24

Figure 21 and Figure 22 show the system connection diagram. The evaluation board demonstrates application circuits, the optimum layout, power supply arrangements and measurement results. Analog5.0V LIN1+ LIN1- 10u 0.1u + Micro- Controller Digital Analog + Electrolytic Capacitor Ceramic Capacitor ...

Page 25

Digital Ground System Controller Note: VSS1-6 must be connected to the same analog ground plane. 1. Grounding and Power Supply Decoupling The AK5388 requires careful attention to power supply and grounding arrangements. AVDD1/2 and DVDD1/2 are usually supplied from the ...

Page 26

External Analog Circuit Examples Figure 23 shows an input buffer circuit example 1. (1 The analog signal is able to input through XLR or BNC connectors. (short JP1 and JP2 for BNC input, open JP1 and JP2 for XLR ...

Page 27

Figure 24 shows an input buffer circuit example in Mono mode. (1 gain=-14.5dB). 4.7k VP+ 4.7k Analog 15.0Vpp VP- NJM5534 VA+ 10k Bias + 11k 0.1 µ 10 µ VA=+5V VP=±15V fin Frequency Response MS1096-E-01 st order ...

Page 28

Performance Plot Figure 25 shows a FFT measurement result. [Conditions] Ta=25ºC; AVDD1/2=5.0V; VREFP1/2=5.0V, VREFL1/2=0V, DVDD=3.3V; VSS1=VSS2=VSS3=VSS4=0V; fs=48kHz; Signal Frequency =1kHz, -1dBFS, Measured by Audio Precision, System Two. +0 -10 -20 -30 -40 -50 -60 -70 - -90 ...

Page 29

LQFP (Unit: mm) 12.8 ± 0.3 10 0.37 ± 0.08 0.10 ■ Material & Lead finish Package molding compound: Lead frame material: Lead frame surface treatment: MS1096-E-01 PACKAGE 1.70max 0.20 M ...

Page 30

Date (YY/MM/DD) Revision Reason 09/07/09 00 09/08/xx 01 MS1096-E-01 MARKING AK5388EQ XXXXXXX AKM 1 1) Pin #1 indication 2) Audio 4 pro Logo 3) Date Code: XXXXXXX(7 digits) 4) Marking Code: AK5388 5) AKM Logo REVISION HISTORY Page Contents First ...

Page 31

These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status ...

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