XC56309VL100A Freescale Semiconductor, XC56309VL100A Datasheet - Page 213

IC DSP 24BIT 100MHZ 196-MAPBGA

XC56309VL100A

Manufacturer Part Number
XC56309VL100A
Description
IC DSP 24BIT 100MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheets

Specifications of XC56309VL100A

Interface
Host Interface, SSI, SCI
Clock Rate
100MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
24kB
Voltage - I/o
3.30V
Voltage - Core
3.30V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
196-MAPBGA
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
102KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC56309VL100A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
XC56309VL100AR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
9.3.5 Special Cases
The following special cases apply during wait and stop state.
9.3.6 DMA Trigger
Each timer can also trigger DMA transfers if a DMA channel is programmed to be triggered by a
timer event. The timer issues a DMA trigger on every event in all modes of operation. To ensure
that all DMA triggers are serviced, provide for the preceding DMA trigger to be serviced before
the DMA channel receives the next trigger.
9.4 Triple Timer Module Programming Model
The timer programming model in Figure 9-20 shows the structure of the timer registers.
9.4.1 Prescaler Counter
The prescaler counter is a 21-bit counter that decrements on the rising edge of the prescaler input
clock. The counter is enabled when at least one of the three timers is enabled (that is, one or more
of the timer enable bits are set) and is using the prescaler output as its source (that is, one or more
of the PCE bits are set).
Freescale Semiconductor
Timer behavior during wait. Timer clocks are active during the execution of the wait
instruction and timer activity is undisturbed. If a timer interrupt is generated, the
DSP56309 leaves the wait state and services the interrupt.
Timer behavior during stop. During execution of the stop instruction, the timer clocks are
disabled, timer activity stops, and the
that happen to the
correct operation, disable the timers before the DSP56309 is placed in stop state.
TIO
signals are ignored when the DSP56309 is in stop state. To ensure
DSP56309 User’s Manual, Rev. 1
TIO
signals are disconnected. Any external changes
Triple Timer Module Programming Model
9-21

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