AT91SAM7S256C-MU Atmel, AT91SAM7S256C-MU Datasheet - Page 421

• Manufacturer Part Number: AT91SAM7S256C-MU
• Description: IC ARM7 MCU 32BIT 256K 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S256C-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT91
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: SPI, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 5
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S256-MU; AT91SAM7S256-MU

32.8
Table 32-4.
6175K–ATARM–30-Aug-10
Offset
0x0
0x4
0x8
0xC
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
0x40
0x44
0x48
0x4C
0x50-0xFC
0x100- 0x124
Syncrhronous Serial Controller (SSC) User Interface
Register Mapping
Register
Control Register
Clock Mode Register
Reserved
Reserved
Receive Clock Mode Register
Receive Frame Mode Register
Transmit Clock Mode Register
Transmit Frame Mode Register
Receive Holding Register
Transmit Holding Register
Reserved
Reserved
Receive Sync. Holding Register
Transmit Sync. Holding Register
Receive Compare 0 Register
Receive Compare 1 Register
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Reserved for Peripheral Data Controller (PDC)
AT91SAM7S Series Preliminary
SSC_RCMR
SSC_RFMR
SSC_TCMR
SSC_TFMR
SSC_RSHR
SSC_TSHR
SSC_RC0R
SSC_RC1R
SSC_CMR
SSC_RHR
SSC_THR
SSC_IMR
SSC_IDR
SSC_IER
SSC_CR
SSC_SR
Name
–
–
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Access
Read
Read
Read
Read
Write
Write
Write
Write
–
–
–
–
–
–
0x000000CC
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
–
421