AT91SAM7S128C-AU Atmel, AT91SAM7S128C-AU Datasheet - Page 499
AT91SAM7S128C-AU
Manufacturer Part Number
AT91SAM7S128C-AU
Description
IC ARM7 MCU 32BIT 128K 64LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91SAM7S16-MU.pdf
(51 pages)
2.AT91SAM7S16-MU.pdf
(779 pages)
3.AT91SAM7S256C-MU.pdf
(2 pages)
Specifications of AT91SAM7S128C-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
AT91SAM7S128-AU-001
AT91SAM7S128AU001
AT91SAM7S128AU001
AT91SAM7S128AU001
AT91SAM7S128AU001
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S128C-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 499 of 779
- Download datasheet (11Mb)
35.3
35.3.1
35.3.2
35.3.3
6175K–ATARM–30-Aug-10
Product Dependencies
I/O Lines
Power Management
Interrupt
For further details on the USB Device hardware implementation, see the specific Product Prop-
erties document.
The USB physical transceiver is integrated into the product. The bidirectional differential signals
DP and DM are available from the product boundary.
Two I/O lines may be used by the application:
DP and DM are not controlled by any PIO controllers. The embedded USB physical transceiver
is controlled by the USB device peripheral.
To reserve an I/O line to check VBUS, the programmer must first program the PIO controller to
assign this I/O in input PIO mode.
To reserve an I/O line to control the board pullup, the programmer must first program the PIO
controller to assign this I/O in output PIO mode.
The USB device peripheral requires a 48 MHz clock. This clock must be generated by a PLL
with an accuracy of ± 0.25%.
Thus, the USB device receives two clocks from the Power Management Controller (PMC): the
master clock, MCK, used to drive the peripheral user interface, and the UDPCK, used to inter-
face with the bus USB signals (recovered 12 MHz domain).
WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be
enabled before any read/write operations to the UDP registers including the UDP_TXCV
register.
The USB device interface has an interrupt line connected to the Advanced Interrupt Controller
(AIC).
Handling the USB device interrupt requires programming the AIC before configuring the UDP.
• One to check that VBUS is still available from the host. Self-powered devices may use this
• One to control the board pullup on DP. Thus, when the device is ready to communicate with
entry to be notified that the host has been powered off. In this case, the board pullup on DP
must be disabled in order to prevent feeding current to the host.
the host, it activates its DP pullup through this control line.
AT91SAM7S Series Preliminary
499
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