ST16C2552IJ44-F Exar Corporation, ST16C2552IJ44-F Datasheet - Page 32

• Manufacturer Part Number: ST16C2552IJ44-F
• Description: IC UART FIFO 16B DUAL 44PLCC
• Manufacturer: Exar Corporation
• Type: RS- 232 or RS- 485r

Specifications of ST16C2552IJ44-F

• Number Of Channels: 2, DUART
• Package / Case: 44-LCC (J-Lead)
• Features: *
• Fifo's: 16 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 3.3 V ~ 5 V
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 4 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Supply Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• No. Of Channels: 2
• Supply Voltage Range: 2.97V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: PLCC
• No. Of Pins: 44
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1258-5

ST16C2552
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
F
F
IGURE
IGURE
(Unloading)
(Loading data
*INT is cleared when the ISR is read or when there is at least one character in the FIFO.
(Unloading)
(Loading data
*INT is cleared when the ISR is read or when there is at least one character in the FIFO.
into FIFO)
TX
INT*
TXRDY#
IOW#
into FIFO)
20. T
21. T
TX
INT*
TXRDY#
IOW#
RANSMIT
RANSMIT
TX FIFO
TX FIFO
Empty
Empty
enabled
enabled
IER[1]
IER[1]
TX FIFO
Data in
R
R
EADY
EADY
Start
Start
Bit
ISR is read
Bit
S
ISR is read
& I
& I
S
T
D0:D7
D0:D7
T
WT
T
NTERRUPT
NTERRUPT
WRI
WRI
Stop
Stop
Bit
Bit
T
T
longer empty
longer empty
TX FIFO no
TX FIFO no
T
T
S
S
IMING
IMING
D0:D7
D0:D7
[FIFO M
[FIFO M
T
T
S
S
TX FIFO
32
Full
D0:D7
D0:D7
ODE
ODE
T
T
T
, DMA M
, DMA M
SRT
T
T
S
S
D0:D7
D0:D7
T
ODE
ODE
WT
T
T
D
E
S
S
NABLED
ISABLED
D0:D7
D0:D7
T
T
]
empty location
]
FOR
At least 1
FOR
T
in FIFO
T
SI
SI
C
C
S
S
Last Data Byte
Last Data Byte
HANNELS
HANNELS
Transmitted
Transmitted
D0:D7
D0:D7
TXDMA#
TXDMA
TX FIFO
TX FIFO
Empty
Empty
T
SRT
T
T
REV. 4.2.2
A & B
A & B