XR16L784IV-F Exar Corporation, XR16L784IV-F Datasheet - Page 50

• Manufacturer Part Number: XR16L784IV-F
• Description: IC UART 8B 3.3V QUAD 64LQFP
• Manufacturer: Exar Corporation
• Type: IrDA or RS- 485r

Specifications of XR16L784IV-F

• Number Of Channels: 4, QUART
• Package / Case: 64-LQFP
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 2.97 V ~ 5.5 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 6.25 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Supply Current: 5 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• No. Of Channels: 4
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 2.97V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1282

XR16L784
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
GENERAL DESCRIPTION ............................................................................................... 1
PIN DESCRIPTIONS ....................................................................................................... 3
1.0 DESCRIPTION ........................................................................................................................................ 6
2.0 FUNCTIONAL DESCRIPTIONS .............................................................................................................. 6
3.0 XR16L784 REGISTERS ........................................................................................................................ 19
2.1 DEVICE RESET .................................................................................................................................................... 6
2.2 UART CHANNEL SELECTION ............................................................................................................................ 6
2.3 SIMULTANEOUS WRITE TO ALL CHANNELS .................................................................................................. 6
2.4 INT# OUPUT ......................................................................................................................................................... 7
2.5 CRYSTAL OSCILLATOR / BUFFER ................................................................................................................... 7
2.6 PROGRAMMABLE BAUD RATE GENERATOR ................................................................................................ 8
2.7 TRANSMITTER .................................................................................................................................................... 9
2.8 RECEIVER ......................................................................................................................................................... 10
2.9 THR AND RHR REGISTER LOCATIONS ......................................................................................................... 12
2.10 AUTOMATIC RTS/DTR HARDWARE FLOW CONTROL OPERATION ......................................................... 12
2.11 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ...................................................................................... 14
2.12 SPECIAL CHARACTER DETECT .................................................................................................................. 14
2.13 AUTO RS485 HALF-DUPLEX CONTROL ...................................................................................................... 15
2.14 INFRARED MODE ............................................................................................................................................ 15
2.15 SLEEP MODE WITH WAKE-UP INDICATOR ................................................................................................ 17
2.16 INTERNAL LOOPBACK .................................................................................................................................. 18
3.1 DEVICE CONFIGURATION REGISTER SET ................................................................................................... 19
A
F
F
F
ORDERING INFORMATION
T
T
T
Figure 3. Typical oscillator connections ........................................................................................................................................... 7
Figure 4. External Clock Connection for Extended Data Rate ......................................................................................................... 8
Figure 5. Baud Rate Generator ........................................................................................................................................................ 8
T
Figure 6. Transmitter Operation in non-FIFO Mode ....................................................................................................................... 10
Figure 7. Transmitter Operation in FIFO and Flow Control Mode .................................................................................................. 10
Figure 8. Receiver Operation in non-FIFO Mode ........................................................................................................................... 11
Figure 9. Receiver Operation in FIFO and Auto RTS Flow Control Mode ..................................................................................... 11
T
Figure 10. Auto RTS/DTR and CTS/DSR Flow Control Operation ................................................................................................ 13
T
Figure 11. Infrared Transmit Data Encoding and Receive Data Decoding .................................................................................... 16
Figure 12. Internal Loop Back ........................................................................................................................................................ 18
Figure 13. The XR16L784 Registers Mapping ............................................................................................................................... 19
T
T
Figure 14. The Global Interrupt Registers, INT0, INT1, INT2 and INT3 ......................................................................................... 21
T
Figure 15. Timer/Counter circuit. .................................................................................................................................................... 22
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
EATURES
PPLICATIONS
2.1.1 HARDWARE RESET ...................................................................................................................................................... 6
2.1.2 SOFTWARE RESET ...................................................................................................................................................... 6
2.7.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ............................................................................................ 9
2.7.2 TRANSMITTER OPERATION IN NON-FIFO MODE ..................................................................................................... 9
2.7.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................ 10
2.8.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................. 11
2.10.1 AUTO CTS/DSR FLOW CONTROL ........................................................................................................................... 13
3.1.1 THE GLOBAL INTERRUPT SOURCE REGISTERS ................................................................................................... 21
3.1.2 GENERAL PURPOSE 16-BIT TIMER/COUNTER. [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (DEFAULT 0XXX-XX-
00-00) ..................................................................................................................................................................................... 22
1: UART C
2: INT# P
3: INT# P
4: T
5: T
6: A
7: XR16L784 R
8: D
9: UART C
1. B
2. P
YPICAL DATA RATES WITH A
RANSMIT AND
UTO
EVICE
LOCK
IN
................................................................................................................................................. 1
O
X
UT
IN
IN
ON
C
D
HANNEL
HANNEL
........................................................................................................................................... 1
O
O
ONFIGURATION
IAGRAM
A
/X
PERATION FOR
PERATION
SSIGNMENT
OFF
EGISTER
R
ECEIVE
S
[3:0] I
(S
................................................................................................................................................................ 1
ELECTION
OFTWARE
............................................................................................................................ 2
F
S
NTERRUPT
OR
ETS
....................................................................................................................................................... 2
D
R
ATA
T
EGISTERS
R
RANSMITTER
ECEIVER
14.7456 MH
................................................................................................................................................ 6
.............................................................................................................................................. 19
) F
R
LOW
EGISTER
S
TABLE OF CONTENTS
OURCE
C
.................................................................................................................................. 20
.................................................................................................................................. 7
ONTROL
, 16C550
............................................................................................................................. 7
Z CRYSTAL OR EXTERNAL CLOCK AT
E
NCODING AND
.................................................................................................................. 14
COMPATIBLE
I
C
LEARING
......................................................................................... 12
................................................................................ 22
16X S
AMPLING
.............................................. 9
REV. 1.2.3