71M6511-IGT/F Maxim Integrated Products, 71M6511-IGT/F Datasheet - Page 12

• Manufacturer Part Number: 71M6511-IGT/F
• Description: IC ENERGY METER RESIDENT 64-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of 71M6511-IGT/F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Address (hex)
Meter Equations
The Compute Engine (CE) program for residential meter configurations implements the equations in Table 4. The I/O RAM
register EQU specifies the equation to be used based on the number and arrangement of phases used for metering. In case of
single-phase metering, the unconnected input should be tied to V3P3A, the analog supply voltage. The EQU selection enables
the 71M6511 to calculate single-phase power measurement based on the type of service used. Table 4 also states the
sequence of the multiplexer in the AFE.
EQU
Pulse Generator
The CE contains two pulse generators which create low jitter pulses at a rate set by the CE DRAM registers APULSEW*WRATE
and APULSER*WRATE if EXT_PULSE (a CE input variable in CE DRAM) is 15. This mode puts the MPU in control of pulse
generation by placing values into the APULSEW and APULSER registers (“external pulse generation”).
If EXT_PULSE is 0, APULSEW is replaced with WSUM_X and APULSER is replaced with VARSUM_X. In this mode, the CE
generates pulse based on its internal computation of WSUM_X and VARSUM_X, the signed sums of energy from all three
elements (“internal pulse generation”).
The DIO_PV and DIO_PW bits as described in the Digital I/O section can be programmed to route WPULSE and VARPULSE
to the output pins DIO6 and DIO7 respectively. DIO6 and DIO7 can be configured to generate interrupts (useful for pulse
counting by the MPU – see On-Chip Resources (DIO Section).
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A Maxim Integrated Products Brand
000
001
Formula
Table 4: Standard Meter Equations (inputs shown gray are scanned but not used for calculation)
(1 element, 2W 1φ)
(1 element, 3W 1φ)
Name
VA(IA-IB)/2
VA IA
Channels used from MUX
Sequence
States 0 → 3
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
Description
Table 3: CE DRAM Locations for ADC Results
© 2005–2010 Teridian Semiconductor Corporation
IA
IA
0
TEMP
VA
VA
1
VA
IA
IB
--
-
-
-
IB
IB
2
Phase A current
Phase A voltage
Phase B current
Reserved
Reserved
Reserved
Temperature
Reserved
Single-Phase Energy Meter IC
Channels used from alternative
MUX Sequence
States 0 → 3
3
-
-
71M6511/71M6511H
TEMP
TEMP
DATA SHEET
0
VA
VA
1
IB
2
-
NOVEMBER 2010
3
-
-
V2.7