71M6511-IGT/F Maxim Integrated Products, 71M6511-IGT/F Datasheet - Page 38

• Manufacturer Part Number: 71M6511-IGT/F
• Description: IC ENERGY METER RESIDENT 64-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of 71M6511-IGT/F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Values read from and written into the DIO ports use the data registers P0, P1 and P2.
A 3-bit configuration word, I/O RAM register, DIO_Rx (0x2009[2:0] through 0x200E[6:4]) can be used for certain pins, when
configured as DIO, to individually assign an internal resource such as an interrupt or a timer control (see Table 52 for DIO pins
available for this option). This way, DIO pins can be tracked even if they are configured as outputs. This feature is useful for
pulse counting. The control resources selectable for the DIO pins are listed in Table 54. If more than one input is connected to
the same resource, the resources are combined using a logical OR.
Additionally, if DIO6 and DIO7 are declared outputs, they can be configured as dedicated pulse outputs (WPULSE = DIO6,
VARPULSE = DIO7) using the I/O RAM registers DIO_PW (0x2008[2]) and DIO_PV (0x2008[3]). In this case, DIO6 and DIO7
are under CE control. DIO4 and DIO5 can be configured to implement the EEPROM Interface by setting the I/O RAM register
DIO_EEX (0x2008[4]).
Physical Memory
Data bus address space is allocated to on-chip memory as shown in Table 55.
Flash Memory: The 71M6511 includes 64KB of on-chip flash memory. The flash memory is intended to primarily contain MPU
program code. In a typical application, it also contains images of the CE program code, CE coefficients, MPU RAM, and I/O
RAM. On power-up, before enabling the CE, the MPU must copy these images to their respective memory locations.
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DIO_R
Value
0000-FFFF
Address
0000-07FF
1000-13FF
2000-20FF
3000-3FFF
(hex)
A Maxim Integrated Products Brand
Resource Selected for DIO Pin
Technology
Flash Memory
Static RAM
Static RAM
Static RAM
Memory
Static RAM
0
DIO_DIR bit
Table 54: Selectable Controls using the DIO_DIR Bits
© 2005–2010 Teridian Semiconductor Corporation
DIO Pin Function
Memory Type
Battery-buffered
1
0
1
2
3
4
5
6
7
Non-volatile
Volatile
Volatile
Volatile
Table 55: MPU Data Memory Map
Table 53: DIO_DIR Control Bit
High priority I/O interrupt (INT0 falling)
NONE
Reserved
T0 (counter0 clock)
T1 (counter1 clock)
High priority I/O interrupt (INT0 rising)
Low priority I/O interrupt (INT1 rising)
Low priority I/O interrupt (INT1 falling)
Program and non-volatile
Configuration RAM
CE Program code
Typical Usage
input
Single-Phase Energy Meter IC
MPU data
(I/O RAM)
CE data
data
71M6511/71M6511H
output
DATA SHEET
Wait States
(at 5MHz)
0
0
5
0
5
NOVEMBER 2010
Memory Size
(bytes)
64KB
2KB
1KB
4KB
256
V2.7