71M6511H-IGT/F Maxim Integrated Products, 71M6511H-IGT/F Datasheet - Page 27

• Manufacturer Part Number: 71M6511H-IGT/F
• Description: IC ENERGY METER RESIDENT 64-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of 71M6511H-IGT/F

• Processor Series: 6511x
• Core: 80515
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 7 KB
• Interface Type: I2C, SSI, UART
• Maximum Clock Frequency: 5 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: 71M6511H-DB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 22 bit Delta Sigma
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Refreshing the WD Timer: The watchdog timer must be refreshed regularly to prevent the reset request signal from
becoming active. This requirement imposes an obligation on the programmer to issue two instructions. The first instruction
sets WDT and the second instruction sets SWDT. The maximum delay allowed between setting WDT and SWDT is 12 clock
cycles. If this period has expired and SWDT has not been set, WDT is automatically reset, otherwise the watchdog timer is
reloaded with the content of the WDTREL register and WDT is automatically reset. Since the WDT requires exact timing,
firmware needs to be designed with special care in order to avoid unwanted WDT resets. TERIDIAN strongly discourages the
use of the software WDT.
Special Function Registers for the WD Timer
Interrupt Enable 0 Register (IEN0):
Interrupt Enable 1 Register (IEN1):
Note: The remaining bits in the IEN1 register are not used for watchdog control
Page: 27 of 98
IEN0.6
IEN1.6
Bit
Bit
A Maxim Integrated Products Brand
Note: The remaining bits in the IEN0 register are not used for watchdog control
MSB
MSB
EXEN2
EAL
Symbol
Symbol
SWDT
WDT
SWDT
WDT
Watchdog timer refresh flag.
Set to initiate a refresh of the watchdog timer. Must be set directly before SWDT
is set to prevent an unintentional refresh of the watchdog timer. WDT is reset by
hardware 12 clock cycles after it has been set.
Watchdog timer start/refresh flag.
Set to activate/refresh the watchdog timer. When directly set after setting WDT, a
watchdog timer refresh is performed. Bit SWDT is reset by the hardware 12 clock
cycles after it has been set.
Function
Function
Table 29: The IEN1 Bit Functions (see also Tables 35/36)
Table 27: The IEN0 Bit Functions (see also Table 34)
Table 28: The IEN1 Register (see also Tables 35/36)
Table 26: The IEN0 Register (see also Table 34)
EX6
ET2
© 2005–2010 Teridian Semiconductor Corporation
EX5
ES0
EX4
ET1
Single-Phase Energy Meter IC
EX1
EX3
71M6511/71M6511H
ET0
EX2
DATA SHEET
EX0
LSB
LSB
NOVEMBER 2010
V2.7