71M6511H-IGT/F Maxim Integrated Products, 71M6511H-IGT/F Datasheet - Page 46
![IC ENERGY METER RESIDENT 64-LQFP](/photos/37/60/376099/lqfp64_sml.jpg)
71M6511H-IGT/F
Manufacturer Part Number
71M6511H-IGT/F
Description
IC ENERGY METER RESIDENT 64-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6511H-IGTF.pdf
(98 pages)
Specifications of 71M6511H-IGT/F
Processor Series
6511x
Core
80515
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
7 KB
Interface Type
I2C, SSI, UART
Maximum Clock Frequency
5 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
71M6511H-DB
Minimum Operating Temperature
- 40 C
On-chip Adc
22 bit Delta Sigma
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
71M6511H-IGT/F
Manufacturer:
PERICOM
Quantity:
1 200
Company:
Part Number:
71M6511H-IGT/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
SRDY is an optional handshake input that indicates that the DSP or data-logging device is ready to receive data. SRDY must
be high to enable SFR to rise and initiate the transfer of the next field. It is expected that SRDY changes state on the rising
edges of SCLK. If SRDY is not high when the SSI port is ready to transmit the next field, transmission will be delayed until it is.
SRDY is ignored except at the beginning of a field transmission. If SRDY is not enabled (by SSI_RDYEN), the SSI port will
behave as if SRDY is always one.
SSDATA is the serial output data. SSDATA changes on the rising edge of SCLK and outputs the contents of a block of CE
RAM words starting with address SSI_STRT and ending with SSI_END. The words are output MSB first.
The field size is set with the SSI_FSIZE register: 0 entire data block, 1-8 bit fields, 2-16 bit fields, 3-32 bit fields. The polarity of
the SFR pulse can be inverted with SSI_FPOL. If SRDY does not delay it, the first SFR pulse in a frame will rise on the third
SCLK after MUX_SYNC (fourth SCLK if 10MHz). MUX_SYNC can be used to synchronize the fields arriving at the data logger
or DSP.
Page: 46 of 98
SSI Signal
A Maxim Integrated Products Brand
LCD Segment
Output Pin
© 2005–2010 Teridian Semiconductor Corporation
SSDATA
Table 59: SSI Pin Assignment
SRDY
SCLK
SFR
Single-Phase Energy Meter IC
SEG3
SEG4
SEG5
SEG6
71M6511/71M6511H
DATA SHEET
NOVEMBER 2010
V2.7