AT86RF230-ZUR Atmel, AT86RF230-ZUR Datasheet - Page 72

• Manufacturer Part Number: AT86RF230-ZUR
• Description: TXRX LOW POWER 2.4GHZ 32VQFN
• Manufacturer: Atmel

Specifications of AT86RF230-ZUR

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Applications: Industrial Monitoring and Control, Wireless Alarm and Security Systems
• Power - Output: -17dBm ~ 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 15.5mA
• Current - Transmitting: 16.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2405 MHz to 2480 MHz
• Interface Type: SPI
• Noise Figure: 6 dB
• Output Power: 20 dB
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 16.5 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Data Rate - Maximum: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.7.4 PLL Interrupt Handling
9.7.5 Register Description
72
AT86RF230
Bit
0x08
Read/Write
Reset value
Bit
0x08
Read/Write
Reset value
(PLL_DCU). To start the calibrations routines the device should be in state PLL_ON.
The center frequency tuning takes a maximum of 80 µs. The completion is indicated by
a PLL_LOCK interrupt. The delay cell calibration loop is completed after 6 µs. This is
typically not indicated by a PLL_LOCK interrupt.
There are two different interrupts indicating the PLL status (see register 0x0F). The
PLL_LOCK interrupt indicates that the PLL has locked. The PLL_UNLOCK interrupt
indicates an unexpected unlock condition. A PLL_LOCK interrupt clears any preceding
PLL_UNLOCK interrupt automatically and vice versa.
A PLL_LOCK interrupt occurs in the following situations:
• State change from TRX_OFF to PLL_ON/RX_ON
• Channel change in states PLL_ON/RX_ON
• Initiating a center frequency tuning manually
The state transition from BUSY_TX to PLL_ON can also initiate a PLL_LOCK interrupt,
due to the PLL settling back to the RX frequency.
Any other occurrences of PLL interrupts indicate erroneous behavior and require
checking of the actual device status.
Register 0x08 (PHY_CC_CCA)
The PHY_CC_CCA register contains register bits to initiate and control the CCA
measurement as well as to set the channel center frequency.
• Bit 7 – CCA_REQUEST
Refer to section 8.6.4.
• Bit [6:5] – CCA_MODE
Refer to section 8.6.4.
• Bit [4:0] – CHANNEL
The register bits CHANNEL define the RX/TX channel. The channel assignment is
according to IEEE 802.15.4.
Table 9-14. Channel Assignment for IEEE 802.15.4 – 2.4 GHz Band
Register Bit
CHANNEL
CCA_REQUEST
R/W
R/W
7
0
3
1
Value
0x0B
0x0C
0x0D
0x0E
R/W
R/W
6
0
2
0
CCA_MODE
CHANNEL
Channel Number
12
13
14
11
R/W
R/W
5
1
1
1
CHANNEL
Center Frequency [MHz]
R/W
R/W
4
0
0
1
5131E-MCU Wireless-02/09
2410
2415
2420
2405
PHY_CC_CCA
PHY_CC_CCA