AT86RF230-ZUR Atmel, AT86RF230-ZUR Datasheet - Page 73
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AT86RF230-ZUR
Manufacturer Part Number
AT86RF230-ZUR
Description
TXRX LOW POWER 2.4GHZ 32VQFN
Manufacturer
Atmel
Datasheet
1.AT86RF230-ZU.pdf
(98 pages)
Specifications of AT86RF230-ZUR
Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Applications
Industrial Monitoring and Control, Wireless Alarm and Security Systems
Power - Output
-17dBm ~ 3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
15.5mA
Current - Transmitting
16.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2405 MHz to 2480 MHz
Interface Type
SPI
Noise Figure
6 dB
Output Power
20 dB
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
16.5 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT86RF230-ZUR
Manufacturer:
ATMEL
Quantity:
1 000
5131E-MCU Wireless-02/09
Bit
0x1A
Read/Write
Reset value
Bit
0x1A
Read/Write
Reset value
Bit
0x1B
Read/Write
Reset value
Bit
0x1B
Read/Write
Reset value
Register 0x1A (PLL_CF)
The register PLL_CF controls the operation of the center frequency calibration loop.
• Bit 7 – PLL_CF_START
PLL_CF_START = 1 initiates the center frequency calibration. The calibration cycle has
finished after a maximum of 80 µs. The register bit is cleared immediately after the
register write operation.
• Bit [6:0] – Reserved
Register 0x1B (PLL_DCU)
The register PLL_DCU controls the operation of the delay cell calibration loop.
Register Bit
PLL_DCU_START
PLL_CF_START
R/W
R/W
R/W
R/W
7
0
3
0
7
0
3
0
Value
0x1A
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
R/W
R/W
R/W
R
6
1
2
1
6
0
2
0
Reserved
Reserved
Channel Number
Reserved
Reserved
15
16
17
18
19
20
21
22
23
24
25
26
R/W
R/W
R/W
R/W
5
0
1
1
5
1
1
0
Center Frequency [MHz]
R/W
R/W
R/W
R/W
AT86RF230
4
1
0
1
4
0
0
0
2425
2430
2435
2440
2445
2450
2455
2460
2465
2470
2475
2480
PLL_DCU
PLL_DCU
PLL_CF
PLL_CF
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