SN260Q STMicroelectronics, SN260Q Datasheet

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Features ■ Integrated 2.4GHz, IEEE 802.15.4-compliant transceiver: – Robust RX filtering allows co-existence with IEEE 802.11g and Bluetooth devices – –99 dBm RX sensitivity (1% PER, 20-byte packet) – +2.5 dBm nominal output power – Increased radio performance mode (Boost ...

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Contents Contents 1 Abbreviations and acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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SN260 6.15 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Contents 13.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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SN260 1 Abbreviations and acronyms Table 1. Abbreviations and acronyms Acronym/abbreviation ACR AES CBC-MAC CCA CCM CCM* CSMA CTR EEPROM ESD ESR FFD FIA GPIO IDE IF IP3 ISR kB kbps LF LNA LQI MAC MSL ...

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References Table 1. Abbreviations and acronyms (continued) Acronym/abbreviation PWM RoHS RSSI SFD SIF SPI UART VCO VDD 2 References ● ZigBee Specification (www.zigbee.org; ZigBee document 053474) ● ZigBee-PRO Stack Profile (www.zigbee.org; ZigBee document 074855) ● ZigBee Stack Profile (www.zigbee.org; ZigBee ...

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SN260 3 General description The SN260 integrates a 2.4GHz, IEEE 802.15.4-compliant transceiver with a 16-bit network processor (XAP2b core) to run EmberZNet™, the Ember ZigBee-compliant network stack. The SN260 exposes access to the EmberZNet API across a standard SPI module ...

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Pin assignment 4 Pin assignment Figure 1. SN260 pin assignment for SPI protocol 8/47 SN260 SN260 ...

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SN260 Figure 2. SN260 pin assignment for UART protocol Table 2. Pin descriptions Pin # Signal 1 VDD_VCO 2 RF_P 3 RF_N 4 VDD_RF 5 RF_TX_ALT_P 6 RF_TX_ALT_N 7 VDD_IF 8 BIAS_R 9 VDD_PADSA 10 TX_ACTIVE 11 nRESET 12 VREG_OUT ...

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Pin assignment Table 2. Pin descriptions (continued) Pin # Signal nSSEL_INT 15 nCTS N.C. 16 nRTS MOSI 17 N.C. MISO 18 N.C. 19 VDD_PADS SCLK 20 N.C. nSSEL 21 N.C. 22 PTI_EN 23 PTI_DATA 24 VDD_PADS N.C. 25 TXD nHOST_INT ...

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SN260 Table 2. Pin descriptions (continued) Pin # Signal 38 OSCB 39 OSCA 40 VDD_24MHZ 41 GND Direction 24MHz crystal oscillator or left open for when using an external clock I/O input on OSCA I/O 24MHz crystal oscillator or external ...

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Top-level functional description 5 Top-level functional description Figure 3 shows a detailed block diagram of the SN260. Figure 3. SN260 block diagram The radio receiver is a low-IF, super-heterodyne receiver. It utilizes differential signal paths to minimize noise interference, and ...

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SN260 The SN260 integrates hardware support for a Packet Trace module, which allows robust packet-based debug. This element is a critical component of InSight Desktop, the Ember software IDE, providing advanced network debug capability when coupled with the InSight Adapter. ...

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Functional description 6 Functional description The SN260 connects to the Host platform through either a standard SPI interface or a standard UART interface. The EmberZNet Serial Protocol (EZSP) has been defined to allow an application to be written on a ...

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SN260 Table 3. CCA mode behavior CCA mode Clear channel reports busy medium if either carrier sense OR RSSI exceeds their 0 thresholds. 1 Clear channel reports busy medium if RSSI exceeds its threshold. 2 Clear channel reports busy medium ...

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Functional description 6.3 Integrated MAC module The SN260 integrates critical portions of the IEEE 802.15.4-2003 MAC requirements in hardware. This allows the SN260 to provide greater bandwidth to application and network operations. In addition, the hardware acts as a first-line ...

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SN260 6.5 16-bit microprocessor The SN260 integrates the XAP2b microprocessor developed by Cambridge Consultants Ltd., making it a true network processor solution. The XAP2b is a 16-bit Harvard architecture processor with separate program and data address spaces. The word width ...

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Functional description 6.6.2 Flash information area (FIA) The SN260 also includes a separate 1024-byte FIA that can be used for storage of data during manufacturing, including serial numbers and calibration values. Programming of this special Flash page can only be ...

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SN260 6.10 Power-on-reset (POR) Each voltage domain (1.8V digital core supply VDD_CORE and pads supply VDD_PADS) has a power-on-reset (POR) cell. The VDD_PADS POR cell holds the always-powered high-voltage domain in reset until the following conditions have been met: ● ...

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Functional description Table 5. High-frequency crystal specifications (continued) Parameter Crystal ESR Crystal ESR Start-up time to stable clock (max. bias) Start-up time to stable clock (optimum bias) Current consumption Current consumption Current consumption 6.11.2 Internal RC oscillator The SN260 has ...

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SN260 6.13 Watchdog timer The SN260 contains an internal watchdog timer clocked from the internal oscillator. If the timer reaches its time-out value of approximately 2 seconds, it will reset the SN260. This reset signal cannot be routed externally to ...

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SPI protocol 7 SPI protocol The SN260 low level protocol centers on the SPI interface for communication with a pair of GPIO for handshake signaling. ● The SN260 looks like a hardware peripheral. ● The SN260 is the slave device ...

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SN260 7.2.1 Command section The Host begins the transaction by asserting the Slave Select and then sending a command to the SN260. This command can be of any length from 2 to 136 bytes and must not begin with 0xFF. ...

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SPI protocol backup of data in the SN260. The SN260 will de-assert the nHOST_INT signal after receiving a byte on the SPI. Due to inherent latency in the SN260, the timing of when the nHOST_INT signal returns to idle can ...

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SN260 7.2.7 Error conditions If two or more different error conditions occur back to back, only the first error condition will be reported to the Host ( possible to report the error). The following are error conditions that ...

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SPI protocol 7.3 SPI protocol timing Figure 7 illustrates all critical timing parameters in the SPI Protocol. These timing parameters are a result of the SN260’s internal operation and both constrain Host behavior and characterize SN260 operation. The parameters shown ...

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SN260 Figure 8. SPI protocol data format The total length of a command must not exceed 136 bytes. All commands must begin with the SPI Byte. Some commands are only two bytes—that is, they contain the SPI Byte and Frame ...

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SPI protocol Table 8. SPI commands & responses (continued) Command Command value Any Any Any Any 0x00 – Reserved 0x0F SPI 0x0A Protocol Version 0x0B SPI Status 0xF0 – Reserved 0xFC Bootloader 0xFD Frame EZSP 0xFE Frame 0xFF Invalid 7.5.1 ...

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SN260 7.5.2 Special response bytes There are only five SPI Byte values, 0x00-0x04, ever used as error codes (see When the error condition occurs, any command sent to the SN260 will be ignored and responded to with one of these ...

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SPI protocol SN260 in reset. While nRESET is asserted, assert (active low) either nWAKE or PTI_DATA and then deassert nRESET to boot the SN260. Do not deassert nWAKE or PTI_DATA until the SN260 asserts nHOST_INT, indicating that the SN260 has ...

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SN260 1. Activate Slave Select (nSSEL). 2. Transmit the command 0x0A - SPI Protocol Version Request. 3. Transmit the Frame Terminator, 0xA7. 4. Wait for nHOST_INT to assert. 5. Transmit and receive 0xFF until a byte other than 0xFF is ...

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SPI protocol – 0x11: EZSP Parameter for this response (stackVersion). Note that this value may vary). – 0x30: EZSP Parameter for this response (stackVersion). Note that this value may vary). – 0xA7: Frame Terminator 8. De-activate Slave Select. 7.7.3 SN260 ...

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SN260 7.7.4 Three-part transaction: Wake, Get Version, Stack Status Callback Figure 12. Timing diagram of the three-part transaction 1. Activate nWAKE and activate timeout timer. 2. SN260 wakes up (if not already) awake and enables communication. 3. nHOST_INT asserts, indicating ...

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SPI protocol 23. Decode the response: – 0xFE: SPI Byte indicating an EZSP Frame – 0x04: Length Byte showing the EZSP Frame is 3 bytes long – 0x00: EZSP Sequence Byte (Note that this value should vary based upon previous ...

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SN260 8 UART Gateway Protocol The UART Gateway protocol is designed for network gateway systems in which the host processor is running a full-scale operating system such as embedded Linux or Windows. The host sends EmberZNet Serial Protocol (EZSP) commands ...

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UART Gateway Protocol The UART signals follow the usual conventions: ● When idle, serial data is high (marking) ● The start bit is low (spacing), and the stop bit is high (marking) ● Data bits are sent least-significant bit first, ...

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SN260 9 SIF module programming and debug interface SIF is a synchronous serial interface developed by Cambridge Consultants Ltd the primary programming and debug interface of the SN260. The SIF module allows external devices to read and write ...

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Typical application 10 Typical application Figure 14 illustrates the typical application circuit for the SN260 using the SPI Protocol. This figure does not contain all decoupling capacitance required by the SN260. The Balun provides the impedance transformation from the antenna ...

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... Resistor, 100 kΩ, 5% O402 Resistor, 3.3 kΩ, 5% 0402 Resistor, 10 kΩ, 5%, 0402 SN260 single-chip ZigBee/802.15.4 solution Crystal, 24.000MHz, ±10 PPM tolerance, ±25 PPM stability, 18pF, - 40° 85°C BALUN, ceramic Typical application Manufacturer/Part No. MURATA LQG18HN2N7 MURATA LQG18HN3N3 STMicroelectronics SN260 ILSI ILCX08-JG5F18-24.000MHZ TDK HHM1521 39/47 ...

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... The SN260 package is a plastic 40-pin QFN that is 6mm x 6mm x 0.9mm. illustrates the package drawing. Figure 15. Package drawing 12 Ordering information Use the following part numbers to order the SN260: ● SN260QT Reel, RoHS ● SN260Q Tray, RoHS To order parts, contact your local STMicroelectronics sales representative our Web site: www.st.com. 40/47 SN260 Figure 15 ...

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SN260 13 Electrical characteristics 13.1 Absolute maximum ratings Table 11 lists the absolute maximum ratings for the SN260. Table 11. Absolute maximum ratings Parameter Regulator voltage (VDD_PADS) Core voltage (VDD_24MHZ, VDD_VCO, VDD_RF, VDD_IF, VDD_PADSA, VDD_FLASH, VDD_SYNTH_PRE, VDD_CORE) Voltage on RF_P,N; ...

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Electrical characteristics 13.3 Environmental characteristics Table 13 lists the environmental characteristics of the SN260. Table 13. Environmental characteristics Parameter ESD (human body model) ESD (charged device model) ESD (charged device model) MSL (moisture sensitivity level) 13.4 DC electrical characteristics Table ...

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SN260 13.5 Digital I/O specifications Table 15 contains the digital I/O specifications for the SN260. The digital I/O power (named VDD_PADS) comes from three dedicated pins (pins 13, 19, and 24). The voltage applied to these pins sets the I/O ...

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Electrical characteristics 13.6 RF electrical characteristics 13.6.1 Receive Table 16 lists the key parameters of the integrated IEEE 802.15.4 receiver on the SN260. Note: Receive measurements were collected with Ember’s SN260 Lattice Balun Reference Design at 2440 MHz and using ...

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SN260 13.6.2 Transmit Table 17 lists the key parameters of the integrated IEEE 802.15.4 transmitter on the SN260. Note: Transmit measurements were collected with Ember’s SN260 Lattice Balun Reference Design at 2440 MHz and using the EmberZNet software stack Version ...

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Revision history 14 Revision history Table 19. Document revision history Date 11-Dec-2006 03-Dec-2007 17-Apr-2008 23-Mar-2009 46/47 Revision 1 Initial release. 2 Document status promoted from Preliminary Data to Datasheet. Corrected units value in 3 page 26. Added UART Gateway Protocol ...

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... SN260 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...