PIC18F26K22-I/SO Microchip Technology, PIC18F26K22-I/SO Datasheet - Page 455
![IC PIC MCU 64KB FLASH 28SOIC](/photos/28/69/286927/28-soic_m28b_sml.jpg)
PIC18F26K22-I/SO
Manufacturer Part Number
PIC18F26K22-I/SO
Description
IC PIC MCU 64KB FLASH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F24K22-ISP.pdf
(494 pages)
Specifications of PIC18F26K22-I/SO
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1KB
Ram Memory Size
3896Byte
Cpu Speed
64MHz
No. Of Timers
7
Processor Series
PIC18F
Core
PIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F26K22-I/SO
Manufacturer:
NXP
Quantity:
928
Part Number:
PIC18F26K22-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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TABLE 27-16: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
FIGURE 27-14:
2010 Microchip Technology Inc.
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1:
Param
No.
Note:
SCL
SDA
2:
TssL2scH,
TssL2scL
TscH
TscL
Tb2b
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TssL2doV
TscH2ssH,
TscL2ssH
Refer to Figure 27-3 for load conditions.
Symbol
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
90
SS to SCK or SCK Input
SCK Input High Time
(Slave mode)
SCK Input Low Time
(Slave mode)
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SS to SDO Output High-Impedance
SCK Output Rise Time
(Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK Edge
SDO Data Output Valid after SS Edge
SS after SCK Edge
Condition
I
2
Start
C™ BUS START/STOP BITS TIMING
91
Characteristic
Preliminary
Continuous
Single Byte
Continuous
Single Byte
PIC18(L)F2X/4XK22
1.25 T
1.25 T
1.5 T
1.5 T
Min
100
T
CY
CY
40
40
10
—
—
—
—
—
—
CY
CY
CY
92
+ 40
+ 40
+ 30
+ 30
Condition
Stop
Max
25
25
50
25
25
50
50
—
—
—
—
—
—
—
—
93
DS41412A-page 455
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
(Note 1)
(Note 1)
(Note 2)
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