NTMD4N03R2G ON Semiconductor, NTMD4N03R2G Datasheet - Page 6

• Manufacturer Part Number: NTMD4N03R2G
• Description: MOSFET PWR N-CH DL 4A 30V 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NTMD4N03R2G

• Fet Type: 2 N-Channel (Dual)
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 60 mOhm @ 4A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 4A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 16nC @ 10V
• Input Capacitance (ciss) @ Vds: 400pF @ 20V
• Power - Max: 2W
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Configuration: Dual Dual Drain
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.048 Ohms
• Forward Transconductance Gfs (max / Min): 6 S
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 4 A
• Power Dissipation: 2 W
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NTMD4N03R2GOS; NTMD4N03R2GOS; NTMD4N03R2GOSTR

the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (T
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance −
General Data and Its Use.”
traverse any load line provided neither rated peak current
(I
transition time (t
DM
The Forward Biased Safe Operating Area curves define
Switching between the off−state and the on−state may
0.01
100
0.1
10
) nor rated voltage (V
1
0.1
V
SINGLE PULSE
T
C
GS
Figure 11. Maximum Rated Forward Biased
= 25 C
V
= 20 V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
r
, t
f
R
THERMAL LIMIT
PACKAGE LIMIT
) does not exceed 10 s. In addition the
DS(on)
Safe Operating Area
1.0
LIMIT
DSS
) is exceeded, and that the
10
SAFE OPERATING AREA
C
) of 25 C.
1.0 ms
10 ms
dc
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NTMD4N03R2
100
6
total power averaged over a complete switching cycle must
not exceed (T
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and must be adjusted for operating
conditions differing from those specified. Although industry
practice is to rate in terms of energy, avalanche energy
capability is not a constant. The energy rating decreases
non−linearly with an increase of peak current in avalanche
and peak junction temperature.
80
60
40
20
A power MOSFET designated E−FET can be safely used
0
25
Figure 12. Maximum Avalanche Energy versus
T
J
, STARTING JUNCTION TEMPERATURE ( C)
J(MAX)
50
Starting Junction Temperature
− T
C
75
)/(R
JC
).
100
I
D
= 4.45 A
125
150