BF909WR,135 NXP Semiconductors, BF909WR,135 Datasheet

MOSFET N-CH 7V 40MA SOT343

BF909WR,135

Manufacturer Part Number
BF909WR,135
Description
MOSFET N-CH 7V 40MA SOT343
Manufacturer
NXP Semiconductors
Datasheets

Specifications of BF909WR,135

Package / Case
CMPAK-4
Transistor Type
N-Channel Dual Gate
Frequency
800MHz
Voltage - Rated
7V
Current Rating
40mA
Noise Figure
2dB
Current - Test
15mA
Voltage - Test
5V
Configuration
Dual
Transistor Polarity
Dual N-Channel
Drain-source Breakdown Voltage
15 V
Gate-source Breakdown Voltage
15 V
Continuous Drain Current
20 mA
Power Dissipation
200 mW
Mounting Style
SMD/SMT
Application
VHF/UHF
Channel Type
N
Channel Mode
Enhancement
Drain Source Voltage (max)
7V
Noise Figure (max)
2.8dB
Frequency (max)
1GHz
Package Type
CMPAK
Pin Count
3 +Tab
Input Capacitance (typ)@vds
3.6@5V@Gate 1/2.3@5V@Gate 2pF
Output Capacitance (typ)@vds
2.3@5VpF
Reverse Capacitance (typ)
0.03@5VpF
Operating Temp Range
-65C to 150C
Mounting
Surface Mount
Number Of Elements
2
Power Dissipation (max)
280mW
Screening Level
Military
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Gain
-
Lead Free Status / Rohs Status
Compliant
Product specification
Supersedes data of 1997 Sep 05
DATA SHEET
BF909WR
N-channel dual-gate MOS-FET
DISCRETE SEMICONDUCTORS
2010 Sep 15

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BF909WR,135 Summary of contents

Page 1

DATA SHEET BF909WR N-channel dual-gate MOS-FET Product specification Supersedes data of 1997 Sep 05 DISCRETE SEMICONDUCTORS 2010 Sep 15 ...

Page 2

... NXP Semiconductors N-channel dual-gate MOS-FET FEATURES  Specially designed for use supply voltage  Short channel transistor with high forward transfer admittance to input capacitance ratio  Low noise gain controlled amplifier GHz  Superior cross-modulation performance during AGC. APPLICATIONS  VHF and UHF applications with supply voltage such as television tuners and professional communications equipment ...

Page 3

... NXP Semiconductors N-channel dual-gate MOS-FET LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER V drain-source voltage DS I drain current D I gate 1 current G1 I gate 2 current G2 P total power dissipation tot T storage temperature range stg T operating junction temperature ...

Page 4

... NXP Semiconductors N-channel dual-gate MOS-FET THERMAL CHARACTERISTICS SYMBOL R thermal resistance from junction to ambient th j-a R thermal resistance from junction to soldering point th j-s Notes 1. Device mounted on a printed-circuit board the temperature at the soldering point of the source lead. s STATIC CHARACTERISTICS = 25 C; unless otherwise specified. ...

Page 5

... NXP Semiconductors N-channel dual-gate MOS-FET 110 handbook, halfpage V unw (dBμV) 100 MHz  MHz 120 k. unw amb G1 Fig.3 Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; see Fig.17. 30 handbook, halfpage (mA) 1 1.2 V 1  Fig.5 Output characteristics; typical values. ...

Page 6

... NXP Semiconductors N-channel dual-gate MOS-FET 60 handbook, halfpage y fs (mS  Fig.7 Forward transfer admittance as a function of drain current; typical values. 16 handbook, halfpage I D (mA G2  120 k (connected Fig.9 Drain current as a function of gate 1 supply voltage (= V see Fig.17. 2010 Sep 15 MLB940 handbook, halfpage ...

Page 7

... NXP Semiconductors N-channel dual-gate MOS-FET 20 handbook, halfpage I D (mA  120 k (connected Fig.11 Drain current as a function of gate 2 voltage; typical values; see Fig.17 handbook, halfpage y is (mS  mA amb Fig.13 Input admittance as a function of frequency; typical values. 2010 Sep 15 MLB944 handbook, halfpage ...

Page 8

... NXP Semiconductors N-channel dual-gate MOS-FET (mS) ϕ  mA amb Fig.15 Forward transfer admittance and phase as a function of frequency; typical values. R GEN 50 Ω 2010 Sep 15 MLB948 2 10 handbook, halfpage ϕ fs (deg (MHz) V AGC Ω Ω Fig.17 Cross-modulation test set-up (mS  mA amb Fig.16 Output admittance as a function of frequency ...

Page 9

... NXP Semiconductors N-channel dual-gate MOS-FET Table 1 Scattering parameters MAGNITUDE ANGLE (MHz) (ratio) (deg) 6.4 50 0.985 12.6 100 0.978 25.0 200 0.957 36.5 300 0.931 47.6 400 0.899 57.4 500 0.868 66.6 600 0.848 74.6 700 0.816 82.2 800 0.792 89.3 900 0.772  ...

Page 10

... NXP Semiconductors N-channel dual-gate MOS-FET PACKAGE OUTLINE Plastic surface-mounted package; reverse pinning; 4 leads DIMENSIONS (mm are the original dimensions UNIT max 0.4 0.7 1.1 mm 0.1 0.8 0.3 0.5 OUTLINE VERSION IEC SOT343R 2010 Sep scale 0.25 2.2 1.35 1.3 1.15 0.10 1.8 1 ...

Page 11

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the ...

Page 12

... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 13

... Interface, Security and Digital Processing expertise Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for the marking codes and the package outline drawings which were updated to the latest version. ...

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