EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 135
EFM32G200F64
Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets
1.EFM32G200F16.pdf
(63 pages)
2.EFM32G200F16.pdf
(10 pages)
3.EFM32G200F16.pdf
(463 pages)
4.EFM32G200F16.pdf
(136 pages)
Specifications of EFM32G200F64
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EFM32G200F16 PDF datasheet
- EFM32G200F16 PDF datasheet #2
- EFM32G200F16 PDF datasheet #3
- EFM32G200F16 PDF datasheet #4
- Current page: 135 of 463
- Download datasheet (8Mb)
14.3.3 24-bit Address Mode
14.3.4 Timing
2010-09-06 - d0001_Rev1.00
This mode allows 24-bit address with 8-bit data. The upper 8 bits of the EBI_AD lines are used for the
highest 16-bits of the address while the lower 8 bits is used for the lowest address bits and data. The
details of the read and write operation is shown in Figure 14.7 (p. 135) and Figure 14.8 (p. 135)
respectively.
Figure 14.7. EBI 24-bit Read Operation
Figure 14.8. EBI 24-bit Write Operation
The duration of the states in the transaction is defined by the corresponding uppercase name above
the state, e.g. the address setup state in Figure 14.8 (p. 135) is active for a number of internal clock
cycles defined by ADDRSET bit field in the EBI_ADDRTIMING register. Similar timing can be defined
by the RDSTRB bitfield in the EBI_RDTIMING register and WRSTRB in the EBI_WRTIMING register.
These parameters all have a minimum duration of 1 cycle, which is set by HW, and writing a value n to
any of these bitfields results in an extended duration of 1+n cycles.
The other timing parameters are ADDRHOLD in the EBI_ADDRTIMING register, RDHOLD and
RDSETUP in the EBI_RDTIMING register and WRHOLD and WR SETUP in the EBI_WRTIMING
register. Writing a value m to one of these bitfields results in a duration the corresponding state of m
cycles. If these parameters are set to 0, it effectively means that the state is skipped.Table 14.1 (p.
136) shows typical settings for timing.
EBI_AD[ 15:8]
EBI_AD[ 7:0]
EBI_WEn
EBI_CSn
EBI_ALE
EBI_AD[ 15:8]
EBI_AD[ 7:0]
EBI_ALE
EBI_CSn
EBI_REn
ADDRSET
ADDR[ 23:16]
ADDR[ 15:8]
ADDRSET
ADDR[ 23:16]
ADDR[ 15:8]
ADDRHOLD
RDSETUP
...the world's most energy friendly microcontrollers
135
WRSETUP
ADDR[ 7:0]
DATA[ 7:0]
Z
ADDR[ 7:0]
RDSTRB
DATA[ 7:0]
WRSTRB
RDHOLD
www.energymicro.com
WRHOLD
Z
Z
Z
Z
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