EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 430
EFM32G200F64
Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets
1.EFM32G200F16.pdf
(63 pages)
2.EFM32G200F16.pdf
(10 pages)
3.EFM32G200F16.pdf
(463 pages)
4.EFM32G200F16.pdf
(136 pages)
Specifications of EFM32G200F64
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EFM32G200F16 PDF datasheet
- EFM32G200F16 PDF datasheet #2
- EFM32G200F16 PDF datasheet #3
- EFM32G200F16 PDF datasheet #4
- Current page: 430 of 463
- Download datasheet (8Mb)
2010-09-06 - d0001_Rev1.00
the shifting operation is performed on internal registers that are not accessible in SW (when reading
LCD_AREGA and LCD_AREGB, the data that was original written will also be read back). The SW must
utilize the knowledge about the current state (ASTATE) to calculate what is currently output. ASTATE is
cleared when LCD_AREGA or LCD_AREGB are updated with new values. See Table 29.14 (p. 430)
for an example.
Table 29.14. LCD Animation Example
In the table, AREGASC = 10, AREGBSC = 10, ALOGSEL = 1 and the resulting data is be displayed on
segment lines 7-0 multiplexed with LCD_COM0.
Figure 29.44. LCD Block Diagram of the Animation Circuit
ASTATE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CLK
SEGD0[ 7:0]
EVENT
LCD_AREGA
11000000
01100000
01100000
00110000
00110000
00011000
00011000
00001100
00001100
00000110
00000110
00000011
00000011
10000001
10000001
11000000
AREGASC = 1 = > shift left
AREGASC = 2 = > shift right
Odd anim ation states
AREGBSC = 1 = > shift left
AREGBSC = 2 = > shift right
Even anim ation states
AREGA
AREGB
LCD_AREGB
11000000
11000000
01100000
01100000
00110000
00110000
00011000
00011000
00001100
00001100
00000110
00000110
00000011
00000011
10000001
10000001
...the world's most energy friendly microcontrollers
430
ALOGSEL
Resulting Data
11000000
11100000
01100000
01110000
00110000
00111000
00011000
00011100
00001100
00001110
00000110
00000111
00000011
10000011
10000001
11000001
www.energymicro.com
Data Out[ 7:0]
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