EFM32G200F64 Energy Micro, EFM32G200F64 Datasheet - Page 423
EFM32G200F64
Manufacturer Part Number
EFM32G200F64
Description
MCU 32BIT 64KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets
1.EFM32G200F16.pdf
(63 pages)
2.EFM32G200F16.pdf
(10 pages)
3.EFM32G200F16.pdf
(463 pages)
4.EFM32G200F16.pdf
(136 pages)
Specifications of EFM32G200F64
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EFM32G200F16 PDF datasheet
- EFM32G200F16 PDF datasheet #2
- EFM32G200F16 PDF datasheet #3
- EFM32G200F16 PDF datasheet #4
- Current page: 423 of 463
- Download datasheet (8Mb)
2010-09-06 - d0001_Rev1.00
Figure 29.39. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0-LCD_COM0
1/3 bias and quadruplex multiplexing - LCD_SEG0-LCD_COM1
• DC voltage = 0 (over one frame)
• V
• The LCD display pixel that is connected to LCD_SEG0 and LCD_COM1 will be OFF with this waveform
Figure 29.40. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0-LCD_COM1
1/3 bias and quadruplex multiplexing - LCD_SEG0-LCD_COM2
• DC voltage = 0 (over one frame)
• V
• The LCD display pixel that is connected to LCD_SEG0 and LCD_COM2 will be ON with this waveform
Figure 29.41. LCD 1/3 Bias and Quadruplex Multiplexing - LCD_SEG0-LCD_COM2
1/3 bias and quadruplex multiplexing - LCD_SEG0-LCD_COM2
• DC voltage = 0 (over one frame)
• V
• The LCD display pixel that is connected to LCD_SEG0 and LCD_COM3 will be OFF with this waveform
RMS
RMS
RMS
-V
-V
-V
-V
-V
-V
V
V
V
V
V
V
LC1
LC2
LC1
LC2
LC2
LC1
LC1
LC2
LC2
LC1
LC2
LC1
-V
-V
-V
= 0.33 × V
= 0.58 × V
= 0.33 × V
V
V
V
V
V
V
LC0
LC0
LC0
(2/3V
LC0
(2/3V
(1/3V
(1/3V
(2/3V
LC0
(2/3V
(1/3V
(1/3V
(2/3V
LC0
(1/3V
(1/3V
(2/3V
LC3
LC3
LC3
(V
(V
(V
(V
(V
(V
(V
(V
(V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
SS
SS
SS
)
)
)
)
)
)
)
)
)
)
)
)
)
Fram e Start
)
)
)
)
Fram e Start
)
)
)
)
Fram e Start
LCD_OUT
LCD_OUT
LCD_OUT
Fram e End
Fram e End
Fram e End
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