S9S08DN32F1MLC Freescale Semiconductor, S9S08DN32F1MLC Datasheet - Page 51
![IC MCU 8BIT 32KB FLASH 32LQFP](/photos/15/89/158999/lqfp-32_sml.jpg)
S9S08DN32F1MLC
Manufacturer Part Number
S9S08DN32F1MLC
Description
IC MCU 8BIT 32KB FLASH 32LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of S9S08DN32F1MLC
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Processor Series
S08D
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
26
Operating Supply Voltage
3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S08DN32F1MLC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S08DN32F1MLC
Manufacturer:
FREESCALE
Quantity:
20 000
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program time provided that the conditions above are met. If the next sequential address is the beginning of
a new row, the program time for that byte will be the standard time instead of the burst time. This is because
the high voltage to the array must be disabled and then enabled again. If a new burst command has not been
queued before the current command completes, then the charge pump will be disabled and high voltage
removed from the array.
A flowchart to execute the burst program operation is shown in
Freescale Semiconductor
BURST PROGRAM
FLOW
Figure 4-3. Burst Program Flowchart
MC9S08DN60 Series Data Sheet, Rev 3
YES
TO BUFFER ADDRESS AND DATA
0
WRITE COMMAND TO FCMD
NEW BURST COMMAND?
TO LAUNCH COMMAND
AND CLEAR FCBEF
WRITE 1 TO FCBEF
WRITE TO FCDIV
WRITE TO Flash
CLEAR ERROR
FPVIOL OR
FACCERR?
FACCERR?
FCBEF?
START
FCCF?
DONE
1
NO
NO
1
1
(1)
(2)
Figure
0
0
YES
(2)
before checking FCBEF or FCCF.
(1)
Wait at least four bus cycles
4-3.
after reset.
Required only once
ERROR EXIT
Chapter 4 Memory
51
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