WJLXT972ALC.A4-857341 Cortina Systems Inc, WJLXT972ALC.A4-857341 Datasheet - Page 22

• Manufacturer Part Number: WJLXT972ALC.A4-857341
• Description: TXRX ETH 10/100 SGL PORT 64-LQFP
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT972ALC.A4-857341

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1008-1042

LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
5.2
5.2.1
5.2.1.1
Cortina Systems
calculation truncation errors found in traditional DSP-based receivers (typically complex
DSP engines with A/D converters). This results in improved receiver noise and cross-talk
performance.
The OSP signal processing scheme also requires substantially less computational logic
than traditional DSP-based designs. This lowers power consumption and also reduces the
logic switching noise generated by DSP engines. This logic switching noise can be a
considerable source of EMI generated on the device’s power supplies.
The OSP-based LXT972A PHY provides improved data recovery, EMI performance, and
low power consumption.
Network Media / Protocol Support
This section includes the following:
The LXT972A PHY supports both 10BASE-T and 100BASE-TX Ethernet over twisted-pair
10/100 Network Interface
The network interface port consists of two differential signal pairs. For specific pin
assignments, see
The LXT972A PHY output drivers can generate one of the following outputs:
When not transmitting data, the LXT972A PHY generates IEEE 802.3-compliant link
pulses or idle code. Depending on the mode selected, input signals are decoded as one of
the following:
Auto-negotiation/parallel detection or manual control is used to determine the speed of
this interface.
Twisted-Pair Interface
The LXT972A PHY supports either 100BASE-TX or 10BASE-T connections over 100 Ω,
Category 5, Unshielded Twisted Pair (UTP) cable. When operating at 100 Mbps, the
LXT972A PHY continuously transmits and receives MLT3 symbols. When not transmitting
data, the LXT972A PHY generates “IDLE” symbols.
During 10 Mbps operation, Xilink* Manchester-encoded data is exchanged. When no data
is being exchanged, the line is left in an idle state. Link pulses are transmitted periodically
to keep the link up.
Only a transformer, RJ-45 connector, load resistor and bypass capacitors are required to
complete this interface. On the transmit side, the LXT972A PHY has an active internal
termination and does not require external termination resistors. Cortina’s waveshaping
technology shapes the outgoing signal to help reduce the need for external EMI filters.
Four slew rate settings allow the designer to match the output waveform to the magnetic
®
•
•
•
• 100BASE-TX
• 10BASE-T
• 100BASE-TX
• 10BASE-T
LXT972A Single-Port 10/100 Mbps PHY Transceiver
Section 5.2.1, 10/100 Network Interface
Section 5.2.2, MII Data Interface
Section 5.2.3, Configuration Management Interface
Section 4.0, Signal Descriptions, on page
15.
5.2 Network Media / Protocol
Support
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