Morph-IC-II FTDI, Morph-IC-II Datasheet - Page 15

Interface Modules & Development Tools USB Hi-Speed Altera Cyclone-II FPGA Mod

Morph-IC-II

Manufacturer Part Number
Morph-IC-II
Description
Interface Modules & Development Tools USB Hi-Speed Altera Cyclone-II FPGA Mod
Manufacturer
FTDI
Datasheet

Specifications of Morph-IC-II

Interface Type
Programmable
Data Bus Width
Serial, 8 bit
Operating Supply Voltage
5 V
Product
Interface Modules
Features
Ultra Fast FPGA Configuration, JTAG Interface
Core Architecture
Cyclone
Core Sub-architecture
Cyclone II
Kit Contents
Board
Kit Features
FT2232HQ Dual, Hi-Speed USB UART/FIFO IC Used For USB
For Use With/related Products
FT2232H, EP2C5F256C8N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
MORPH-IC-II
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3.5 Morph-IC-II Hardware Configuration
3.5.1 Communications and Programming Interfaces of Morph-IC-II
Morph-IC-II communicates with a PC via USB. To allow USB communications between a PC and the FPGA,
Morph-IC-II uses an FT2232H USB device to create a communications bridge between the PC USB
interface and the FPGA. This communications bridge splits into two channels: a programming interface
channel and a parallel 245 FIFO communications interface channel. The programming interface uses
channel B of the FT2232H to configure the FPGA using Altera‟s Passive Serial interface. The 245
communications interface uses channel A of the FT2232H to transfer data, either synchronously or
asynchronously, over the 245 FIFO interface to and from the FPGA. The connections of the programming
interface are illustrated in Fig. 6 and the connections of the 245 FIFO data interface are illustrated in Fig.
7.
For synchronous 245 FIFO mode two extra data lines are required; these are CLKOUT and OE# (Output
Enable). These two additional signals provide the synchronous clock and control line for the synchronous
245 mode. This mode can transmit data at higher rates than asynchronous 245 FIFO. These signals are
only available on channel A of the FT2232H chip therefore; Morph-IC-II uses channel A for the FIFO
interface as opposed to MorphIC-1K which has the FIFO interface in channel B. This leaves channel B
available on Morph-IC-II to be used to program the FPGA. This difference does not affect backward
compatibility with MorphIC-1K hardware, but this change needs to be considered when upgrading a
MorphIC-1K application to a Morph-IC-II application.
Morph-IC-II utilises the functionality of the Multi-Protocol Synchronous Serial Engine (MPSSE)
architecture in channel B of the FT2232H chip to adapt to the Altera‟s Passive Serial interface. MPSSE is
an FTDI function that allows different synchronous protocols to be configured on any available data
channel. Once the FPGA has been configured, channel B of FT2232H can be reconfigured, using MPSSE,
to operate as general purpose IO pins (see Section 3.5.2 for details on GPIO).
The FPGA can be configured and reconfigured in less than 0.1 of a second. This provides flexibility for any
application to be reconfigured on-the-fly. The FPGA configuration file (*.RBF or Raw Binary File) is output
by Altera Quartus II software. These configuration files can then be downloaded to the FPGA using a
*.RBF loading utility called the MorphLd which is included in the Morph-IC-II package.
commands driven by FTDI‟s DLL library. An example of where a software programme executed a load
*.RBF file command is the MorphIO-II utility where the utility is set to run an *.RBF containing the HDL
code designed for this programme is loaded to the FPGA More information and instructions on how to use
these utilities are given in application note AN_141_MorphIO-II and MorphLd Utilities for Morph-IC-II.
Alternatively, for on-the–fly programming, application software can be used to load *.RBFs using
USB
Copyright © 2010 Future Technology Devices International Limited
`
Fig. 6 – The Passive Serial Programming Interface
FT2232HQ USB
INTERFACE I.C
Programming Interface
38
39
40
41
43
46
GPIOL0
GPIOL3
TCK
TMS
TDO
TDI
CONF_DONE
NSTATUS
NCONFIG
DATA3
DATA0
DCLK
M13
L13
J5
H4
F1
B3
ALTERA CYCLONE II
Document Reference No.: FT_000198
EP2C5F256C8N
FPGA
Clearance No.: FTDI#
MORPH-IC-II Datasheet
Version 1.03
14
164

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