XRT75R12IB-F Exar Corporation, XRT75R12IB-F Datasheet
XRT75R12IB-F
Specifications of XRT75R12IB-F
Related parts for XRT75R12IB-F
XRT75R12IB-F Summary of contents
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... MRing_n Monitor DMO_n ICT P N ART UMBER XRT75R12IB Exar Corporation 48720 Kato Road, Fremont CA, 94538 attenuator performance meets the ETSI TBR-24 and Bellcore GR-499 specifications. The XRT75R12 provides a Parallel Microprocessor 3 Interface for programming and control. The XRT75R12 supports analog, remote and digital loop-backs ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR FEATURES RECEIVER 3 R Technology (Reconfigurable, Redundancy) On chip Clock and Data Recovery circuit for high input jitter tolerance Meets E3/DS3/STS-1 Jitter Tolerance Requirement Detects and Clears LOS as per ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 GENERAL DESCRIPTION.............................................................................................................. 1 A ............................................................................................................................................................... 1 PPLICATIONS XRT 75R12 .................................................................................................................................... 1 IGURE LOCK IAGRAM OF THE ORDERING INFORMATION .................................................................................................................... 1 F ..................................................................................................................................................................... 2 EATURES T ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 4.3 B3ZS/HDB3 ENCODER .................................................................................................................................. 29 4.3.1 B3ZS ENCODING ....................................................................................................................................................... 29 F 18. B3ZS E F ................................................................................................................................................. 29 IGURE NCODING ORMAT 4.3.2 HDB3 ENCODING ....................................................................................................................................................... ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 21: APS ABLE EDUNDANCY RANSMIT T 22: APS ABLE EDUNDANCY ECIEVE ONTROL T 23 ABLE HANNEL EVEL NTERRUPT NABLE T ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR PIN DESCRIPTIONS ( BY FUNCTION SYSTEM-SIDE TRANSMIT INPUT AND TRANSMIT CONTROL PINS IGNAL AME YPE P4 TxON F22 TxCLK0 AA22 TxCLK1 H22 TxCLK2 Y23 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 SYSTEM-SIDE TRANSMIT INPUT AND TRANSMIT CONTROL PINS IGNAL AME YPE C25 TxNEG0 AB25 TxNEG1 H23 TxNEG2 W23 TxNEG3 H24 TxNEG4 Y26 TxNEG5 H3 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR SYSTEM-SIDE TRANSMIT INPUT AND TRANSMIT CONTROL PINS IGNAL AME YPE C23 MTip0 AD23 MTip1 D19 MTip2 AC19 MTip3 D15 MTip4 AC15 MTip5 E11 MTip6 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS IGNAL AME YPE D25 RLOS0 O AD25 RLOS1 G23 RLOS2 AA24 RLOS3 J24 RLOS4 U24 RLOS5 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS IGNAL AME YPE F23 RxNEG/LCV0 O AC26 RxNEG/LCV1 F24 RxNEG/LCV2 U23 RxNEG/LCV3 L23 RxNEG/LCV4 T24 RxNEG/LCV5 L4 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 RECEIVE LINE SIDE PINS IGNAL AME YPE B22 RTip0 I AE22 RTip1 B18 RTip2 AE18 RTip3 A14 RTip4 AF14 RTip5 D13 RTip6 AC13 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR CLOCK INTERFACE IGNAL AME YPE R5 SFM_EN I R1 E3Clk I T1 DS3Clk I U1 STS-1Clk/12M I C26 CLKOUT0 O W22 CLKOUT1 K23 CLKOUT2 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 GENERAL CONTROL PINS IGNAL AME YPE P3 TEST **** AE25 TRST I TMS AB23 I AB5 TCK I AB4 TDI I AE2 TDO ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR MICROPROCESSOR PARALLEL INTERFACE - IGNAL AME YPE K25 Addr0 I M22 Addr1 M23 Addr2 M24 Addr3 K26 Addr4 L26 Addr5 M26 Addr6 N26 Addr7 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 POWER SUPPLY PINS AME IN UMBERS RVDD0 D22 RVDD1 AC22 RVDD2 D18 RVDD3 AC18 RVDD4 E15 RVDD5 AB15 RVDD6 E12 RVDD7 AB12 RVDD8 A9 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR GROUND PINS AME IN UMBERS RGND0 A22 RGND1 AF22 RGND2 A18 RGND3 AF18 RGND4 E14 RGND5 AB14 RGND6 E13 RGND7 AB13 RGND8 D9 RGND9 AC9 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE IN IST UMBER AME B8 A1 AGND B9 A2 AGND B10 A3 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR AME IN F5 TxCLK10 J25 F22 TxCLK0 J26 F23 RxNEG/LCV0 K1 F24 RxNEG/LCV2 K2 F25 DVDD K3 F26 DGND K4 G1 TxCLK6 K5 G2 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 AME IN Y1 TxNEG7 AB15 Y2 DGND AB16 Y3 RxPOS9 AB17 Y4 TxCLK9 AB18 Y5 DVDD AB19 Y22 DVDD AB20 Y23 TxCLK3 AB21 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR AME AF13 AVDD AF14 RTip5 AF15 TGND5 AF16 DVDD AF17 DVDD AF18 RGND3 AF19 TGND3 AF20 DVDD AF21 DVDD AF22 RGND1 AF23 TGND1 AF24 DVDD ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 FUNCTIONAL DESCRIPTION The XRT75R12 is a twelve channel fully integrated Line Interface Unit featuring EXAR’s R (Reconfigurable, Relayless Redundancy) for E3/DS3/STS-1 applications. independent Receivers, Transmitters and Jitter Attenuators in ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 2.0 CLOCK SYNTHESIZER The LIU uses a flexible user interface for accepting clock references to generate the internal master clocks used to drive the LIU. The reference clock used to ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 2.1 Clock Distribution Network cards that are designed to support multiple line rates which are not configured for single frequency mode should ensure that a clock is applied to ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 3.0 THE RECEIVER SECTION The receiver is designed so that the LIU can recover clock and data from an attenuated line signal caused by cable loss or flat loss according ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ACG/E B IGURE QUALIZER LOCK RTIP_n RRing_n 3.3.1 Recommendations for Equalizer Settings The Equalizer has two gain settings to provide optimum equalization. In the case of normally ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR ALOS (A LOS) D ABLE HE NALOG REQEN (DS3 A REQEN S PPLICATION ETTING DS3 0 1 STS 3.5.2 Disabling ALOS/DLOS Detection For debugging purposes ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 IGURE OSS OF IGNAL EFINITION FOR RTIP/ RRing RLOS Output Pin 0 UI 3.5.4 Interference Tolerance For E3 mode, ITU-T G.703 Recommendation specifies that ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T ABLE M C ODE ABLE E3 DS3 STS-1 3.5.5 Muting the Recovered Data with LOS condition: When the LOS condition is declared, the clock recovery circuit locks into the ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 SYMBOL PARAMETER RxClk Duty Cycle RxClk Frequency E3 DS-3 STS-1 t RxClk rise time (10% o 90%) RRX t RxClk falling time (10% to 90%) FRX t RxClk to ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 4.0 THE TRANSMITTER SECTION The transmitter is designed so that the LIU can accept serial data from a local device, encode the data properly, and then output an analog pulse ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 F IGURE t RTX TxClk TPData or TNData TTIP or TRing SYMBOL PARAMETER TxClk Duty Cycle TxClk Frequency E3 DS-3 STS-1 t TxClk Rise Time (10% to 90%) RTX ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR F 17 IGURE UAL AIL ATA ORMAT Data 0 TPData TNData TxClk 4.2 Transmit Clock The Transmit Clock applied via TxClk_n pins, for the selected data ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 F 19. HDB3 E F IGURE NCODING ORMAT TClk TPDATA 1 0 Line Signal 1 4 RANSMIT ULSE HAPER The Transmit Pulse Shaper ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 4.5 E3 line side parameters The XRT75R12 line output at the transformer output meets the pulse shape specified in ITU-T G.703 for 34.368 Mbits/s operation. The pulse mask as specified ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE RANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS PARAMETER T RANSMITTER LINE SIDE OUTPUT CHARACTERISTICS Transmit Output Pulse Amplitude (Measured at secondary ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR F 22. B GR-253 CORE T IGURE ELLCORE 1.2 1 0.8 0.6 0.4 0 IME IN NIT NTERVALS < < -0.85 T -0.38 < ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 STS ABLE RANSMITTER INE P ARAMETER T RANSMITTER LINE SIDE OUTPUT CHARACTERISTICS Transmit Output Pulse Amplitude (measured with TxLEV = 0) Transmit Output Pulse Amplitude ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR IME IN NIT NTERVALS < < -0.85 T -0.36 < < -0.36 T 0.36 < < 0.36 T 1.4 < < -0.85 T -0.68 < < -0.68 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 4.6 Transmit Drive Monitor This feature is used for monitoring the transmit line for occurrence of fault conditions such as a short circuit on the line or a defective ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 5.0 JITTER There are three fundamental parameters that describe circuit performance relative to jitter Jitter Tolerance Jitter Transfer Jitter Generation 5 ITTER OLERANCE Jitter tolerance is a measure ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 IGURE NPUT ITTER OLERANCE 1.5 0.3 0.15 0.1 0.01 0.03 JITTER FREQUENCY (kHz) 5.1.2 E3 Jitter Tolerance Requirements ITU-T ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 10 ABLE ITTER MPLITUDE VERSUS I J NPUT ATE S TANDARD ( / ) 34368 ITU-T G.823 1.5 44736 GR-499 5 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ATE M ASK ( ) KBITS G.823 34368 ETSI-TBR-24 44736 GR-499, Cat I GR-499, Cat II GR-253 CORE 51840 GR-253 CORE The jitter attenuator within the XRT75R12 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 6.0 DIAGNOSTIC FEATURES 6.1 PRBS Generator and Detector The XRT75R12 contains an on-chip Pseudo Random Binary Sequence (PRBS) generator and detector for diagnostic purpose. With the PRBSEN_n bit = “1”, ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 6.2 LOOPBACKS The XRT75R12 offers three loopback modes for diagnostic purposes. The loopback modes are selected via the RLB_n and LLB_n bits n the Channel control registers select the ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 6.2.2 DIGITAL LOOPBACK When the Digital Loopback is selected, the transmit clock TxClk_n and transmit data inputs (TxPOS_n & TxNEG_n are looped back and output onto the RxClk_n, RxPOS_n and ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 6.3 TRANSMIT ALL ONES (TAOS) Transmit All Ones (TAOS) can be set by setting the TAOS_n control bits to “1” in the Channel control registers. When the TAOS is ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 7.0 MICROPROCESSOR INTERFACE BLOCK The Microprocessor Interface section supports communication between the local microprocessor (µP) and the LIU. The XRT75R12 supports a parallel interface asynchronously or synchronously timed to the ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 14: XRT75R12 M ABLE AME YPE CS I Chip Select Input This active low signal selects the microprocessor interface of the XRT75R12 LIU and ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR 5. After the µP toggles the Write signal "Low", the LIU will toggle the RDY output pin "Low". The LIU does this to inform the µP that the data has ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 F 36. S µP I IGURE YNCHRONOUS NTERFACE READ OPERATION PCLK t 0 Addr[7:0] Valid Address CS D[7: RDY T ABLE S P ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0x03 CR3 0x04 CR4 0x05 CR5 0x06 CR6 0x07 CR7 0x08 CR8 0x09 0x0A ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0x21 CR33 0x22 CR34 0x23 CR35 0x24 CR36 0x25 CR37 0x26 CR38 0x27 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0x40 0x41 CR65 0x42 CR66 0x43 CR67 0x44 CR68 0x45 CR69 0x46 CR70 0x47 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0x5E 0x5F 0x60 CR96 0x61 CR97 0x62 0x63 0x64 0x65 0x66 0x67 0x68 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0x7C 0x7D 0x7E 0x7F 0x80 CR128 0x81 CR129 0x82 CR130 0x83 CR131 0x84 CR132 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0x9A CR154 0x9B CR155 0x9C CR156 0x9D 0x9E 0x9F 0xA0 0xA1 CR161 0xA2 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0xB8 0xB9 0xBA CR186 0xBB CR187 0xBC CR188 0xBD 0xBE 0xBF 0xC0 0xC1 CR193 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0xD6 CR214 0xD7 CR215 0xD8 0xD9 0xDA CR218 0xDB CR219 0xDC CR229 0xDD ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 17: C ABLE OMMAND DDRESS OMMAND EGISTER ( ECIMAL 0xF5 0xF6 0xF7 0xF8 0xF5 0xF9 0xFA 0xFB 0xFC 0xFD 0xFE 0xFF THE GLOBAL/CHIP-LEVEL ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 REGISTER DESCRIPTION - GLOBAL REGISTERS T 19: APS/R ABLE EDUNDANCY Reserved Reserved TxON AME ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 21: APS/R ABLE EDUNDANCY Reserved Reserved TxON AME YPE N UMBER 7,6 Reserved 5 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE HANNEL EVEL Reserved Reserved Channel 5 Interrupt Enable R AME N UMBER 7,6 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 24 ABLE HANNEL EVEL Reserved Reserved Channel 5 Interrupt Sta- tus R AME N UMBER 7, ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE HANNEL EVEL Reserved Reserved Channel 11 Interrupt Enable R AME N UMBER ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 26 ABLE HANNEL EVEL Reserved Reserved Channel 11 Interrupt Status R AME N UMBER 7, ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE HIP EVISION R/O R/O R UMBER AME 7 - ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR THE PER-CHANNEL REGISTERS The XRT75R12 consists of 120 per-Channel Registers (12 channels and 10 registers per channel). presents the overall Register Map with the Per-Channel Registers unshaded. REGISTER DESCRIPTION - ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE OURCE EVEL NTERRUPT Reserved UMBER AME ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR UMBER AME 1 Change of LOS R/W Condition Interrupt Enable 0 Change of DMO R/W Condition Interrupt Enable T 31: XRT75R12 R ABLE B 7 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE OURCE EVEL NTERRUPT UMBER AME Reserved 3 Change of FL Con- RUR dition Interrupt Sta- ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 33: XRT75R12 R ABLE Reserved Loss of PRBS Digital LOS Pattern Sync Defect Declared R/O R ABLE ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE LARM UMBER AME 5 Digital LOS Defect Declared 4 Analog LOS Defect Declared TATUS ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 34 ABLE LARM UMBER AME 3 FL Alarm Declared 2 Receive LOL Condi- tion Declared TATUS EGISTER ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE LARM UMBER AME 1 Receive LOS Defect Condition Declared 0 Transmit DMO Con- dition Declared ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 35: XRT75R12 R ABLE Reserved Internal Transmit Drive Monitor R/W T 36: T ABLE RANSMIT UMBER ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 36: T ABLE RANSMIT UMBER AME 2 TAOS R/W 1 TxCLKINV R/W 0 TxLEV R ONTROL EGISTER ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 37: XRT75R12 R ABLE Reserved Disable DLOS Detector R ABLE ECEIVE UMBER ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE ECEIVE UMBER AME 2 LOSMUT Enable R/W 1 Receive Monitor R/W Mode Enable 0 Receive Equalizer R/W Enable R ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 39: XRT75R12 R ABLE Reserved PRBS Enable Ch_n R ABLE HANNEL UMBER ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ABLE HANNEL UMBER AME 4 RLB_n R/W 3 LLB_n R/W 2 E3_n R ONTROL EGISTER ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 40 ABLE HANNEL UMBER AME 1 DS3 R/W STS- SR/DR_n R ONTROL EGISTER HANNEL DDRESS ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 41: XRT75R12 R ABLE EGISTER Reserved T 42 ABLE ITTER TTENUATOR UMBER AME 7 ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 42 ABLE ITTER TTENUATOR UMBER AME Path Ch_n 0 JA0 Ch_n T 43: XRT75R12 R ABLE EGISTER A DDRESS ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 T 45: XRT75R12 R ABLE EGISTER A DDRESS OCATION 0x0- APST IER0 ISR0 AS0 0 1- IER1 ISR1 AS1 X 0x2- IER2 ISR2 AS2 0x3- ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T 47: XRT75R12 R ABLE EGISTER A DDRESS OCATION 0x0- APST IER0 ISR0 AS0 0 1- IER1 ISR1 AS1 X 0x2- IER2 ISR2 AS2 0x3- IER3 ...
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TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0.4 8.0 ELECTRICAL CHARACTERISTICS P SYMBOL ARAMETER V Supply Voltage DD V Input Voltage at any Pin IN I Input current at any pin IN S Storage Temperature TEMP A ...
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XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR T ABLE SYMBOL P STS1 Power Consumption CC_STS1 P STS1 Power Consumption with Jitter Attenuator Enabled CC_STS1JA V 2 Input Low Voltage Input High Voltage IH V ...
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... TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR REV. 1.0 ART UMBER XRT75R12IB F 37 IGURE ACKAGE IMENSIONS ORDERING INFORMATION P ACKAGE 420 TBGA 420 Tape Ball Grid Array ( mm, TBGA) Rev. 1. (A1 corner feature is mfger option) INCHES MILLIMETERS SYMBOL MIN MAX MIN A 0 ...
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... EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’ ...