MPC8536EAVTAVL Freescale Semiconductor, MPC8536EAVTAVL Datasheet - Page 110

Microprocessors (MPU) PQ38S 8536 SQUID

MPC8536EAVTAVL

Manufacturer Part Number
MPC8536EAVTAVL
Description
Microprocessors (MPU) PQ38S 8536 SQUID
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8536EAVTAVL

Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
1500 MHz
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 90 C
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
0 C
Package / Case
FCPBGA-783
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8536EAVTAVLA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Thermal
Simulations with heat sinks were done with the package mounted on the 2s2p thermal test board. The thermal interface material
was a typical thermal grease such as Dow Corning 340 or Wakefield 120 grease.For system thermal modeling, the MPC8535E
thermal model without a lid is shown in
conductivity of 19.8 W/m•K and a through-plane conductivity of 1.13 W/m•K. The solder balls and air are modeled as a single
block 29 x 29 x 0.5 mm with an in-plane conductivity of 0.034 W/m•K and a through plane conductivity of 12.1 W/m•K. The
die is modeled as 9.6 x 9.57 mm with a thickness of 0.75 mm. The bump/underfill layer is modeled as a collapsed thermal
resistance between the die and substrate assuming a conductivity of 7.5 W/m•K in the thickness dimension of 0.07 mm. The die
is centered on the substrate. The thermal model uses approximate dimensions to reduce grid. Please refer to the case outline for
actual dimensions.
2.24.2
110
Junction-to-ambient (@200 ft/min)
Junction-to-board thermal
Junction-to-case thermal
Notes
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
2. Per JEDEC JESD51-2 and JESD51-6 with the board (JESD51-9) horizontal.
3. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured
4. Thermal resistance between the active surface of the die and the case top surface determined by the cold plate method
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
on the top surface of the board near the package.
(MIL SPEC-883 Method 1012.1) with the calculated case temperature. Actual thermal resistance is less than 0.1 •C/W
Recommended Thermal Model
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Characteristic
Conductivity
Bump/Underfill (9.6 x 9.6 × 0.07 mm) Collapsed Thermal Resistance
Silicon
Table 79. Package Thermal Characteristics (continued)
Kz
Kx
Ky
Kz
Kx
Ky
Kz
Figure 72
Table 80. MPC8535E Thermal Model
Solder and Air (29 × 29 × 0.5 mm)
Temperature dependent
Substrate (29 × 29 × 1.2 mm)
The substrate is modeled as a block 29 x 29 x 1.2 mm with an in-plane
Die (9.6x9.6 × 0.85 mm)
Value
0.034
0.034
19.8
19.8
1.13
12.1
7.5
Four layer board (2s2p)
JEDEC Board
Symbol
W/m•K
W/m•K
W/m•K
Units
R
R
R
θJA
θJB
θJC
Value
< 0.1
14
10
Freescale Semiconductor
°C/W
°C/W
°C/W
Unit
Notes
C/W
1, 2
3
4

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