LCMXO640C-3TN100C Lattice, LCMXO640C-3TN100C Datasheet - Page 20
![CPLD - Complex Programmable Logic Devices 640 LUTS 74 I/O](/photos/16/2/160258/tqfp-100_sml.jpg)
LCMXO640C-3TN100C
Manufacturer Part Number
LCMXO640C-3TN100C
Description
CPLD - Complex Programmable Logic Devices 640 LUTS 74 I/O
Manufacturer
Lattice
Series
MachXOr
Datasheet
1.LCMXO640C-3TN100C.pdf
(95 pages)
Specifications of LCMXO640C-3TN100C
Memory Type
SRAM
Number Of Macrocells
320
Delay Time
4.9 ns
Number Of Programmable I/os
74
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Supply Current
17 mA
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-100
Mounting Style
SMD/SMT
Supply Voltage (max)
3.465 V
Supply Voltage (min)
1.71 V
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
4.9ns
Voltage Supply - Internal
1.71 V ~ 3.465 V
Number Of Logic Elements/blocks
-
Number Of Gates
-
Number Of I /o
74
Operating Temperature
0°C ~ 85°C
Mounting Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO640C-3TN100C
Manufacturer:
STC
Quantity:
12 000
Company:
Part Number:
LCMXO640C-3TN100C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LCMXO640C-3TN100C
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
Table 2-8. I/O Support Device by Device
Table 2-9. Supported Input Standards
Number of I/O Banks
Type of Input Buffers
Types of Output Buffers
Differential Output
Emulation Capability
PCI Support
Single Ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI
Differential Interfaces
BLVDS
1. Top Banks of MachXO1200 and MachXO2280 devices only.
2. MachXO1200 and MachXO2280 devices only.
2
Single-ended
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
1
2
MachXO256
, LVDS
Input Standard
2
, LVPECL
2
, RSDS
4
Single-ended
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
MachXO640
2
2-17
3.3V
√
√
√
√
√
√
2.5V
√
√
√
√
√
VCCIO (Typ.)
8
Single-ended
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
All I/O Banks
Top side only
1.8V
MachXO1200
√
√
√
√
√
√
MachXO Family Data Sheet
1.5V
√
√
√
√
√
√
1.2V
√
√
√
√
√
8
Single-ended
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
All I/O Banks
Top side only
MachXO2280
Architecture