APA300-FGG256 Actel, APA300-FGG256 Datasheet - Page 56

• Manufacturer Part Number: APA300-FGG256
• Description: FPGA - Field Programmable Gate Array 300K System Gates
• Manufacturer: Actel

Specifications of APA300-FGG256

• Processor Series: APA300
• Core: IP Core
• Maximum Operating Frequency: 150 MHz
• Number Of Programmable I/os: 290
• Data Ram Size: 73728
• Supply Voltage (max): 2.7 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.3 V
• Number Of Gates: 300 K
• Package / Case: FPBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Input Buffer Delays
Figure 2-25 • Input Buffer Delays
Table 2-35 • Worst-Case Commercial Conditions
Table 2-36 • Worst-Case Commercial Conditions
2 -4 6
Macro Type
IB33
IB33S
Notes:
1. t
2. t
3. LVTTL delays are the same as CMOS delays.
4. For LP Macros, V
Macro Type
IB25LP
IB25LPS
Notes:
1. t
2. t
3. LVTTL delays are the same as CMOS delays.
4. For LP Macros, V
ProASIC
INYH
INYL
INYH
INYL
= Input Pad-to-Y Low
= Input Pad-to-Y Low
= Input Pad-to-Y High
= Input Pad-to-Y High
PLUS
V
V
DDP
DDP
Flash Family FPGAs
= 3.0 V, V
= 2.3 V, V
2.5 V, CMOS Input Levels
2.5 V, CMOS Input Levels
3.3 V, CMOS Input Levels
3.3 V, CMOS Input Levels
DDP
DDP
=2.3 V for delays.
= 2.3 V for delays.
DD
DD
PAD
= 2.3 V, T
= 2.3 V, T
J
J
= 70°C
= 70°C
3
3
3
3
, Low Power
, Low Power, Schmitt Trigger
, No Pull-up Resistor
, No Pull-up Resistor, Schmitt Trigger
Description
Description
IBx
Y
v5.9
PAD
GND
Y
50%
t
INYH
V
DDP
50%
V
50%
DD
Max. t
t
Max. t
INYL
Std.
Std.
0 V
0.4
0.6
0.9
0.7
50%
INYH
INYH
1
1
Max. t
Max. t
Std.
Std.
0.6
0.9
0.6
0.8
INYL
INYL
2
2
Units
Units
ns
ns
ns
ns