APA075-PQG208 Actel, APA075-PQG208 Datasheet - Page 63
APA075-PQG208
Manufacturer Part Number
APA075-PQG208
Description
FPGA - Field Programmable Gate Array 75K System Gates
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA075-PQG208
Processor Series
APA075
Core
IP Core
Maximum Operating Frequency
150 MHz
Number Of Programmable I/os
158
Data Ram Size
27648
Supply Voltage (max)
2.7 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
2.3 V
Number Of Gates
75 K
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
APA075-PQG208
Manufacturer:
Actel
Quantity:
135
Company:
Part Number:
APA075-PQG208
Manufacturer:
Freescale
Quantity:
245
Part Number:
APA075-PQG208
Manufacturer:
ACTEL/爱特
Quantity:
20 000
Company:
Part Number:
APA075-PQG208A
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
APA075-PQG208I
Manufacturer:
LT
Quantity:
3 057
Company:
Part Number:
APA075-PQG208I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Table 2-50 • JTAG Switching Characteristics
Figure 2-27 • JTAG Operation Timing
Description
Output delay from TCK falling to TDI, TMS
TDO Setup time before TCK rising
TDO Hold time after TCK rising
TCK period
RCK period
Notes:
1. For DC electrical specifications of the JTAG pins (TCK, TDI, TMS, TDO, TRST), refer to
2. If RCK is being used, there is no minimum on the TCK period.
and
Table 2-24 on page 2-38
when V
TMS, TDI
DDP
TCK
TDO
= 3.3 V.
t
TCKTDI
t
t
TCK
TDOTCK
Symbol
t
t
t
t
TDOTCK
TCKTDO
v5.9
TCKTDO
TCKTDI
t
t
RCK
TCK
Table 2-22 on page 2-34
100
Min
100
–4
10
0
2
ProASIC
1,000
1,000
Max
PLUS
4
Flash Family FPGAs
when V
DDP
Unit
ns
ns
ns
ns
ns
= 2.5 V
2-53