LE24L042CS-LV-TFM-E SANYO, LE24L042CS-LV-TFM-E Datasheet - Page 8

• Manufacturer Part Number: LE24L042CS-LV-TFM-E
• Description: IC EEPROM 4KBIT 400KHZ WLP4
• Manufacturer: SANYO

Specifications of LE24L042CS-LV-TFM-E

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 4K (512 x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 4-WLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 869-1230-2

SDA
SDA
7 EEPROM read operations
7-1. Current address reading
7-2. Random read
7-3. Sequential read
Random read is a mode in which any memory address is specified and its data read. The address is specified by a
dummy write input.
First, when the EEPROM receives the 7-bit device address and write command code “0” following the start condition,
it generates an acknowledge signal. It then receives the 8-bit word address, and generates an acknowledge signal.
Through these operations, the word address is loaded into the address counter inside the EEPROM.
Next, the start condition is input again and the current read is initiated. This causes the data of the word address that
was input using the dummy write input to be output. If, after the data is output, an acknowledge signal is not sent and
the stop condition is input, reading is completed, and the EEPROM returns to standby mode.
The address equivalent to the memory address accessed last +1 is held as the internal address of the EEPROM for
both write* and read operations. Therefore, provided that the master device has recognized the position of the
EEPROM address pointer, data can be read from the memory address with the current address pointer without
specifying the word address.
As with writing, current address reading involves receiving the 7-bit device address and read command code “1”
following the start condition, at which time the EEPROM generates an acknowledge signal. After this, the 8-bit data
of the (n+1) address is output serially starting with the highest bits. After the 8 bits have been output, by not sending
an acknowledge signal and inputting the stop condition, the EEPROM completes the read operation and is set to
standby mode.
If the previous read address is the last address, the address for the current address reading is rolled over to become
address 0.
*: If the write data is 1 or more bytes but less than 16 bytes, the current address after page writing is the address
equivalent to the number of bytes to be written in the specified word address +1. If the write data is 16 or more bytes,
it is the designated word address. If the last address (A3-A0=1111b) on the page has been designated by byte write as
the word address, the first address (A3-A0=0000b) on the page serves as the internal address after writing.
In this mode, the data is read continuously, and sequential read operations can be performed with both current address
read and random read. If, after the 8-bit data has been output, acknowledge “0” is input and reading is continued
without issuing the stop condition, the address is incremented, and the data of the next address is output.
If acknowledge “0” continues to be input after the data has been output in this way, the data is successively output
while the address is incremented. When the last address is reached, it is rolled over to address 0, and the data
continues to be read. As with current address read and random read, the operation is completed by inputting the stop
condition without sending an acknowledge signal.
1
1
Device Address
Device Address
0 1 0
0 1 0
S2
S2
SDA
S1
S1
Dummy Write
A8
A8
W
R
R/W
R/W
1
ACK
ACK
0 1 0
A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 - D1 D0
Word Address(n)
Device Address
Data(n)
S2
S1
A8
LE24L042CS
ACK
R
D7 D6 - D1 D0
R/W
Data(n+1)
ACK
D7 D6 D5 D4 D3 D2 D1 D0
ACK
Data(n+1)
1
Device Address
0 1 0
ACK
D7 D6 - D1 D0
Data(n+2)
S2
S1
Current Read
A8
NO ACK
R
R/W
ACK
ACK
D7 D6 - D1 D0
D7 D6 - D1 D0
Data(n+x)
Data(n)
No.A1440-8/10
NO ACK
NO ACK