L5987 STMicroelectronics, L5987 Datasheet - Page 21

• Manufacturer Part Number: L5987
• Description: IC REG STEPDOWN 3A 8VFQFPN
• Manufacturer: STMicroelectronics
• Type: Step-Down (Buck)r

Specifications of L5987

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 0.6 V ~ 18 V
• Current - Output: 3A
• Frequency - Switching: 250kHz
• Voltage - Input: 2.9 V ~ 18 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 8-VFQFN, Exposed Pad
• Output Voltage: 0.6 V
• Output Current: 3 A
• Output Power: 1.5 W
• Input Voltage: 2.9 V to 18 V
• Switching Frequency: 250 KHz
• Mounting Style: SMD/SMT
• Duty Cycle (max): 100 %
• Low Dropout Operation: 100 % duty cycle
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L5987
6.4.1
Equation 17
where:
Equation 18
Equation 19
As seen in
following paragraph the guidelines to select the Type II and Type III compensation network
are illustrated.
Type III compensation network
The methodology to stabilize the loop consists of placing two zeros to compensate the effect
of the LC double pole, so increasing phase margin; then to place one pole in the origin to
minimize the dc error on regulated output voltage; finally to place other poles far away the
zero dB frequency.
If the equivalent series resistance (ESR) of the output capacitor introduces a zero with a
frequency higher than the desired bandwidth (that is: 2π∗ESR∗COUT<1/BW), the type III
compensation network is needed. Multi layer ceramic capacitors (MLCC) have very low ESR
(<1 mΩ), with very high frequency zero, so type III network is adopted to compensate the
loop.
In
(f
Equation 20
Z1
Figure 11
, f
Z2
) and three poles (f
Chapter 5.3
the type III compensation network is shown. This network introduces two zeros
f
Q
LC
=
=
----------------------------------------------------------------------------------------- -
----------------------------------------------------------------------- -
2π
two different kind of network can compensate the loop. In the two
R
f
Z1
OUT
⋅
P0
L
=
L C
G
, f
+
----------------------------------------------- -
2π C
⋅
⋅
LC
Doc ID 14972 Rev 3
L C
C
P1
OUT
⋅
s ( )
OUT
⋅
, f
1
OUT
P2
3
=
⋅
⋅
⋅
). They expression are:
R
1
(
R
------------------------------------------------------------------------ -
1
OUT
1
⋅
1
+
(
+
R
+
----------------------------
2π Q f ⋅
-------------- -
R
OUT
ESR
R
⋅
OUT
E SR
3
1
⋅
)
s
,
+
+
,
------------------------- -
2π f
ESR
LC
f
⋅
Z2
f
s
+
zESR
zESR
)
⎛
⎝
,
=
------------------ -
2π f
----------------------------- -
2π R
s
=
⋅
⋅
LC
------------------------------------------- -
2π ESR C
1
R
4
⎞
⎠
OUT
⋅
2
⋅
C
4
1
=
Application information
⋅
V
--------------
I
OUT
OUT
OUT
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