SPIO-4/NOPB National Semiconductor, SPIO-4/NOPB Datasheet - Page 21

• Manufacturer Part Number: SPIO-4/NOPB
• Description: BOARD INTERFACE FOR AFE
• Manufacturer: National Semiconductor

Specifications of SPIO-4/NOPB

• Main Purpose: Interface, Analog Front End (AFE)
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: SAM3U, XC6SLX16
• Primary Attributes: USB Powered or External Supply
• Secondary Attributes: GUI, I2C, SPI, USB Interfaces
• Accessory Type: Digital Interface Board
• Msl: MSL 1 - Unlimited
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SPI0-4/NOPB; SPI0-4/NOPB

D
C
B
A
3p3V
DBG1
DBG3
DBG5
DBG7
DBG9
DBG11
DBG13
DBG15
DBG17
DBG19
DBG21
DBG23
DBG25
DBG27
DBG29
DBG31
DBG33
DBG35
DBG37
DBG39
DBG41
DBG43
DBG45
DBG47
R9 750R
R9 750R
R10 750R
R10 750R
R11 750R
R11 750R
R12 750R
R12 750R
50PIN_MALE_HDR
50PIN_MALE_HDR
C48
C48
0.1uF
0.1uF
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
DGND
D1
D1
J4
J4
DGND
D2
D2
D3 GRN_LED
D3 GRN_LED
D4 GRN_LED
D4 GRN_LED
C49
C49
1.0uF
1.0uF
GRN_LED
GRN_LED
GRN_LED
GRN_LED
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
5
5
DBG2
DBG4
DBG6
DBG8
DBG10
DBG12
DBG14
DBG16
DBG18
DBG20
DBG22
DBG24
DBG26
DBG28
DBG30
DBG32
DBG34
DBG36
DBG38
DBG40
DBG42
DBG44
DBG46
DBG48
C53
C53
0.1uF
0.1uF
3p3V
C54
C54
0.1uF
0.1uF
C55
C55
0.1uF
0.1uF
DBG1
DBG2
DBG3
DBG4
DBG5
DBG6
DBG7
DBG8
DBG9
DBG10
DBG11
DBG12
DBG13
DBG14
DBG15
DBG16
DBG17
DBG18
DBG19
DBG20
DBG21
DBG22
DBG23
DBG24
DBG25
DBG26
DBG27
DBG28
DBG29
DBG30
DBG31
DBG32
DBG33
DBG34
DBG35
DBG36
DBG37
DBG38
DBG39
DBG40
DBG41
DBG42
DBG43
DBG44
DBG45
DBG46
DBG47
DBG48
C56
C56
0.1uF
0.1uF
C57
C57
0.1uF
0.1uF
G6
G1
G3
M1
M3
M5
D3
E4
E3
F6
F5
F4
F3
H7
H6
H5
H4
H3
K6
K3
K4
K5
C2
C1
D2
D1
E1
F2
F1
H1
H2
K2
K1
N2
N1
N3
P1
P2
P3
T1
T2
U1
U2
P4
N4
J7
J6
J3
L5
L7
L6
L4
J1
L1
L2
L3
DGND
IO_L54N_M3A11_3
IO_L54P_M3RESET_3
IO_L50P_M3WE_3
IO_L55P_M3A13_3
IO_L55N_M3A14_3
IO_L51P_M3A10_3
IO_L51N_M3A4_3
IO_L53N_M3A12_3
IO_L53P_M3CKE_3
IO_L49P_M3A7_3
IO_L49N_M3A2_3
IO_L44P_GCLK21_M3A5_3
IO_L44N_GCLK20_M3A6_3
IO_L47P_M3A0_3
IO_L47N_M3A1_3
IO_L45N_M3ODT_3
IO_L40P_M3DQ6_3
IO_L42N_GCLK24_M3LDM_3
IO_L42P_GCLK25_TRDY2_M3UDM_3
IO_L43N_GCLK22_IRDY2_M3CASN_3
IO_L43P_GCLK23_M3RASN_3
IO_L45P_M3A3_3
IO_L31P_3
IO_L39P_M3LDQS_3
IO_L83P_3
IO_L83N_VREF_3
IO_L52P_M3A8_3
IO_L52N_M3A9_3
IO_L50N_M3BA2_3
IO_L48P_M3BA0_3
IO_L48N_M3BA1_3
IO_L46N_M3CLKN_3
IO_L46P_M3CLK_3
IO_L41N_GCLK26_M3DQ5_3
IO_L41P_GCLK27_M3DQ4_3
IO_L40N_M3DQ7_3
IO_L38P_M3DQ2_3
IO_L38N_M3DQ3_3
IO_L37N_M3DQ1_3
IO_L37P_M3DQ0_3
IO_L36N_M3DQ9_3
IO_L35P_M3DQ10_3
IO_L35N_M3DQ11_3
IO_L1N_VREF_3
IO_L34N_M3UDQSN_3
IO_L34P_M3UDQS_3
IO_L2N_3
IO_L33N_M3DQ13_3
IO_L33P_M3DQ12_3
IO_L32N_M3DQ15_3
IO_L32P_M3DQ14_3
IO_L36P_M3DQ8_3
IO_L2P_3
IO_L1P_3
IO_L31N_VREF_3
IO_L39N_M3LDQSN_3
BNK3_VDDIO
C58
C58
10uF
10uF
U5-4
U5-4
XC6SLX9CSG324
XC6SLX9CSG324
4
4
C101
C101
100uF
100uF
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
C50
C50
0.1uF
0.1uF
E2
G4
J2
J5
M4
R2
C51
C51
0.1uF
0.1uF
BNK3_VDDIO
C52
C52
0.1uF
0.1uF
JUMER TO SELECT BANK VOUT
3p3V
C60
C60
0.1uF
0.1uF
VTEST
1
2
3
C61
C61
0.1uF
0.1uF
hdr_3pin
hdr_3pin
J3
J3
1
2
3
1p2V
DGND
C62
C62
10uF
10uF
DONE V17
3
3
3
FPGA_DONE_N
G11
E11
D12
C12
C13
A13
F10
F11
G8
E7
E8
F7
E6
F8
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
U5-6
U5-6
XC6SLX9CSG324
XC6SLX9CSG324
XILINX JTAG HDR FOR CONFIG OR CHIPSCOPE
TP20
TP20
1
3p3V
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32
C100
C100
100uF
100uF
R72
R72
10.0K
10.0K
F12
E12
U15
V15
T12
V12
N10
P11
M10
N9
M11
N11
N7
P8
M8
N8
N6
P7
hdr_6pin
hdr_6pin
J2
J2
3
1
2
3
4
5
6
3p3V
FPGA_PRGM_N
PROGRAM V2
1
2
3
4
5
6
DGND
DGND
3p3V
C63
C63
1.0uF
1.0uF
DGND
TP1
TP1
FPGA_TCK
FPGA_TDI
FPGA_TMS
FPGA_TDO
2
2
DGND
TP3
TP3
DGND
G12
G17
A17
D15
B18
D16
R16
P13
V17
A18
B13
C16
D10
E15
H10
K10
J11
J15
L11
G2
G5
V2
A1
B7
C3
D5
H8
K8
J4
J9
L9
TCK
TDI
TMS
TDO
SUSPEND
CMPCS_B_2
DONE_2
PROGRAM_B_2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Title
Title
Title
Size
Size
Size
Date:
Date:
Date:
U5-5
U5-5
XC6SLX9CSG324
XC6SLX9CSG324
National Semiconductor, Santa Clara, CA 95052
National Semiconductor, Santa Clara, CA 95052
National Semiconductor, Santa Clara, CA 95052
B
B
B
SPIO4 FPGA DEBUG, JTAG Interfaces & Pwr
SPIO4 FPGA DEBUG, JTAG Interfaces & Pwr
SPIO4 FPGA DEBUG, JTAG Interfaces & Pwr
2010 National Semiconductor
2010 National Semiconductor
2010 National Semiconductor
Document Number
Document Number
Document Number
Wednesday, November 17, 2010
Wednesday, November 17, 2010
Wednesday, November 17, 2010
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
870600474-001
870600474-001
870600474-001
B1
B17
E14
E5
E9
G10
J12
K7
M9
P10
P14
P5
G7
H11
H9
J10
J8
K11
K9
L10
L8
M12
M7
M17
M2
M6
N13
R1
R14
R18
R4
R9
T16
U12
U6
V1
V18
DGND
3p3V
1p2V
Sheet
Sheet
Sheet
1
1
6
6
6
of
of
of
12
12
12
Rev
Rev
Rev
2.0
2.0
2.0
D
C
B
A