EVB-LAN7500-LC SMSC, EVB-LAN7500-LC Datasheet - Page 14

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EVB-LAN7500-LC

Manufacturer Part Number
EVB-LAN7500-LC
Description
EVALUATION BOARD FOR LAN7500
Manufacturer
SMSC
Datasheets

Specifications of EVB-LAN7500-LC

Design Resources
EVB-LAN7500-LC BOM EVB-LAN7500-LC Gerber Files EVB-LAN7500-LC Schematic
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
No
Utilized Ic / Part
LAN7500
Primary Attributes
USB 2.0 to 10/100/1000 Ethernet Controller
Secondary Attributes
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1105
EVB-LAN7500
Revision 1.0 (11-01-10)
NUM PINS
NUM PINS
1
1
1
1
1
1
1
Bias Resistor.
External USB
Mode Select
JTAG Test
JTAG Test
Data Input
JTAG Test
JTAG Test
Data Out
DMINUS
DPLUS
NAME
NAME
Clock
USB
USB
USBRBIAS
SYMBOL
SYMBOL
USBDM
USBDP
TDO
TCK
TMS
TDI
Table 2.3 JTAG Pins
Table 2.4 USB Pins
DATASHEET
BUFFER
BUFFER
TYPE
TYPE
VO8
(PU)
(PD)
(PU)
AIO
AIO
VIS
VIS
VIS
AI
14
JTAG (IEEE 1149.1) data output.
JTAG (IEEE 1149.1) data input.
Note:
JTAG (IEEE 1149.1) test clock.
Note:
JTAG (IEEE 1149.1) test mode select.
Note:
Note:
Note:
Used for setting HS transmit current level and on-
chip termination impedance. Connect to an
external 12K 1.0% resistor to ground.
Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
When not used, tie this pin to
VDDVARIO.
When not used, tie this pin to VSS.
When not used, tie this pin to
VDDVARIO.
The functionality of this pin may be
swapped to USB DPLUS via the
Swap
The functionality of this pin may be
swapped to USB DMINUS via the
Swap
bit of
bit of
DESCRIPTION
DESCRIPTION
Configuration Flags
Configuration Flags
SMSC LAN7500/LAN7500i
Datasheet
0.
0.
Port
Port

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