EVAL-ADF4001EBZ2 Analog Devices Inc, EVAL-ADF4001EBZ2 Datasheet - Page 8
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EVAL-ADF4001EBZ2
Manufacturer Part Number
EVAL-ADF4001EBZ2
Description
BOARD EVAL FOR ADF4001
Manufacturer
Analog Devices Inc
Datasheet
1.ADF4001BRUZ.pdf
(16 pages)
Specifications of EVAL-ADF4001EBZ2
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
ADF4001
Primary Attributes
1 Input, 1 Output
Secondary Attributes
2.7 V ~ 5.5 V Supply
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADF4001
X = DON’T CARE
DB23
X
RESERVED
DB22
X
DB21
X
LDP
0
1
DB20
LDP
DB19
OPERATION
THREE CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
FIVE CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
T2
BE SET TO 00 FOR NORMAL
TEST MODE BITS SHOULD
MODE
TEST
BITS
DB18
T1
OPERATION
ABP2
0
0
1
1
DB17
ABP2
BACKLASH
WIDTH
ANTI-
DB16
ABP1
ABP1
0
1
0
1
Table III. Reference Counter Latch Map
DB15 DB14
R14
ANTIBACKLASH PULSE WIDTH
2.9ns
1.3ns
6.0ns
2.9ns
R13
R14
0
0
0
0
.
.
.
1
1
1
1
DB13
R12
DB12
R11
–8–
R13
0
0
0
0
.
.
.
1
1
1
1
DB11
R10
14-BIT REFERENCE COUNTER
R12
DB10
0
0
0
0
.
.
.
1
1
1
1
R9
DB9
R8
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
DB8
R7
R3
0
0
0
1
.
.
.
1
1
1
1
DB7
R6
DB6
R5
R2
0
1
1
0
.
.
.
0
0
1
1
DB5
R4
DB4
R3
R1
1
0
1
0
.
.
.
0
1
0
1
DB3
R2
DIVIDE RATIO
1
2
3
4
.
.
.
16380
16381
16382
16383
DB2
R1
C2 (0) C1 (0)
DB1
CONTROL
BITS
REV. A
DB0