ISL9208EVAL2Z Intersil, ISL9208EVAL2Z Datasheet
ISL9208EVAL2Z
Specifications of ISL9208EVAL2Z
Related parts for ISL9208EVAL2Z
ISL9208EVAL2Z Summary of contents
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... Sleep Mode • Pb-free (RoHS compliant) CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners. ISL9208 FN6446 Sense DS(ON) Copyright Intersil Americas Inc ...
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Pinout Functional Diagram VC7/VCC CB7 VCELL6 CB6 VCELL5 LEVEL CB5 SHIFTERS/ VCELL4 CELL BALANCE CB4 CIRCUITS VCELL3 CB3 VCELL2 CB2 VCELL1 CB1 BACKUP SUPPLY VSS 2 ISL9208 ISL9208 (32 LD QFN) TOP VIEW ...
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Pin Descriptions SYMBOL VC7/VCC Battery cell 7 voltage input/VCC supply. This pin is used to monitor the voltage of this battery cell externally at pin AO. This pin also provides the operating voltage for the IC circuitry. VCELLN Battery cell ...
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... VCELL Input Current ( CELL1 VCELL1 4 ISL9208 Thermal Information Thermal Resistance (Typical, Notes 1, 2) θ 36. QFN . . . . . . . . . . . . . . . . . . . . . . Continuous Package Power Dissipation . . . . . . . . . . . . . . . . .400mW Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below - 0 0.5V http://www.intersil.com/pbfree/Pb-FreeReflow.asp SS RGO - 22. 0. <27V TEST CONDITION V ...
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Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued) PARAMETER SYMBOL VCELL Input Current ( CELLN VCELLN OVERCURRENT/SHORT CIRCUIT PROTECTION SPECIFICATIONS Overcurrent Detection Threshold V (Discharge) Voltage Relative To DSREF (Default in Boldface) Overcurrent Detection Threshold ...
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Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued) PARAMETER SYMBOL Over Charge Current Time-out (Default In Boldface) OVER-TEMPERATURE PROTECTION SPECIFICATIONS Internal Temperature Shutdown T Threshold Internal Temperature Hysteresis Internal Over-temperature Turn On Delay Time External Temperature Output ...
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Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued) PARAMETER SYMBOL ANALOG OUTPUT SPECIFICATIONS Cell Monitor Analog Output Voltage Accuracy Cell Monitor Analog Output External V Temperature Accuracy Internal Temperature Monitor Output V INTMON Voltage Slope Internal Temperature ...
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Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued) PARAMETER SYMBOL SERIAL INTERFACE CHARACTERISTICS SCL Clock Frequency Pulse Width Suppression Time at SDA and SCL Inputs SCL Falling Edge to SDA Output Data Valid Time the Bus Must ...
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Wake up timing (WKPOL = 0) V WKUP2 WKUP PIN t WKUP WKUP BIT Wake up timing (WKPOL = 1) <t V WKUP1 WKUP PIN t WKUP WKUP BIT Change in Voltage Source, FET Control SCL BIT SDA 3 AO ...
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Automatic Temperature Scan AUTO TEMP CONTROL (INTERNAL ACTIVATION) MONITOR TIME = 5ms TEMP3V PIN EXTERNAL TEMPERATURE OVER-TEMPERATURE TMP3V/13 DELAY TIME = 1ms XOT BIT Discharge Overcurrent/Short Circuit Monitor OCD V DSENSE t SCD ‘0’ DOC BIT ‘0’ ...
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Charge Overcurrent Monitor V CSENSE V OCC ‘0’ COC BIT TEMP3V OUTPUT 12V CFET OUTPUT µC TURNS ON CFET Serial Interface Timing Diagrams Bus Timing SCL t SU:STA t HD:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) Symbol Table WAVEFORM INPUTS ...
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Registers ADDR REGISTER READ/WRITE 00H Config/Op Read only Status 01H Operating Read only Status (Note 10) 02H Cell Balance Read/Write 03H Analog Out Read/Write 04H FET Control Read/Write 05H Discharge Set Read/Write (Write only if DISSETEN bit set) 06H Charge ...
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Status Registers BIT FUNCTION 7 RESERVED Reserved for future expansion. 6 RESERVED Reserved for future expansion Indicates the device is an ISL9208. This bit is set in the chip and cannot be changed. Single AFE 4 WKUP This ...
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Control Registers TABLE 4. CELL BALANCE CONTROL REGISTER (ADDR: 02H) BIT 7 BIT 6 BIT 5 CB7ON CB6ON CB5ON ...
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Configuration Registers The device is configured for specific application requirements using the Configuration Registers. The configuration registers consist of SRAM memory. BIT FUNCTION 7 SLEEP Force Sleep 6 LDMONEN Turn on VMON connection 5:2 RESERVED 1 CFET 0 DFET TABLE ...
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TABLE 8. CHARGE/TIME SCALE CONFIG REGISTER (ADDR: 06H) SETTING Bit 7 DENOCC Turn off automatic OC charge control BIT 6 BIT 5 OCCV1 OCCV0 Bit 4 SCLONG Short circuit long delay Bit ...
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BIT FUNCTION 7 FSETEN When set to “1”, allows writes to the Feature Set register. When set to “0”, prevents writes to the Feature Enable discharge set writes Set register (Addr: 07H). Default on initial power up is “0”. ...
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WKUP Pin Operation There are two ways to design a wake up of the ISL9208 active LOW connection (WKPOL = “0” - default), the device wakes up when a charger is connected to the pack. This pulls the ...
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VSS OPEN POWER FETs ISL9208 V REF LDFAIL = 1 if VMON >V VMONH ≤ VMON VMONL LDMONEN VSS FIGURE 4. LOAD MONITOR CIRCUIT LOAD MONITORING The load monitor function in the ISL9208 (see Figure 4) ...
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Turning off the FETs in the event of an over-temperature condition prevents continued discharge or charge of the cells when they are over heated. Turning off the cell balancing in the event of an over-temperature condition prevents damage to the ...
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Cell Balancing OVERVIEW A typical ISL9208 Li-ion battery pack consists of five to seven cells in series, with one or more cells in parallel. This combination gives both the voltage and power necessary for power tool, e-bikes, electric wheel chairs, ...
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User Flags The ISL9208 contains four flags in the register area that the microcontroller can use for general purpose indicators. These bits are designated UFLG3, UFLG2, UFLG1, and UFLG0. The microcontroller can set or reset these bits by writing into ...
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WRITE OPERATIONS For a write operation, the device requires a slave byte and an address byte. The slave byte specifies the particular 2 device on the I C bus that the master is writing to. The address specifies one of ...
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Register Protection The Discharge Set, Charge Set, and Feature Set configuration registers are write protected on initial power up. In order to write to these registers it is necessary to set a bit to enable each one. These write enable ...
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Applications Circuits The following application circuits are ideas to consider when developing a battery pack implementation. There are many more ways that the pack can be designed. ISL9208 0.1µF VC7/VCC CB7 VCELL6 CB6 VCELL5 CB5 VCELL4 CB4 VCELL3 CB3 VCELL2 ...
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ISL9208 0.1µF VC7/VCC CB7 VCELL6 SCL CB6 SDA VCELL5 WKUP CB5 RGC VCELL4 RGO CB4 TEMP3V VCELL3 TEMPI CB3 VCELL2 AO CB2 4.7µF VCELL1 VMON CB1 CFET MINIMIZE LENGTH DFET MAXIMIZE GAUGE V SS DSREF OPTIONAL B- FIGURE 16. 7-CELL ...
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ISL9208 0.1µF VC7/VCC CB7 VCELL6 SCL CB6 SDA VCELL5 WKUP CB5 RGC VCELL4 RGO CB4 TEMP3V VCELL3 TEMPI CB3 VCELL2 AO CB2 4.7µF VCELL1 VMON CB1 CFET MINIMIZE LENGTH DFET MAXIMIZE GAUGE V SS DSREF OPTIONAL B- FIGURE 17. 7-CELL ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...