SERDESUR-65USB/NOPB National Semiconductor, SERDESUR-65USB/NOPB Datasheet - Page 42

• Manufacturer Part Number: SERDESUR-65USB/NOPB
• Description: EVAL BOARD FOR DS90UR905
• Manufacturer: National Semiconductor

Specifications of SERDESUR-65USB/NOPB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

www.national.com
Revision History
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2/01/2010
DS90UR905Q DATASHEET LIMITS HAVE BEEN
UPDATED PER CHARACTERIZATION RESULT AND
ARE THE FINAL LIMITS
Updated TABLE 12: deleted ID[x] Address 7'b 110 1000
(h'68) (8'b 1101 0000 (h'D0))
Updated TABLE 13: deleted ID[x] Address 7'b 111 0000
(h'70) (8'b 1110 0000 (h'E0))
Updated DS90UR906Q Pin Diagram: strap changes on
pin11, pin14, and pin42
Updated DS90UR906Q Deserializer Pin Descriptions:
RDS feature changed to OS_PCLK and OS_DATA.
Added OP_LOW feature.
Changed strap pin 14 feature from “RDS” to
“OS_DATA” (Output Slew_DATA)
Added strap to pin 11 “OS_PCLK” (Output Slew_PCLK)
Added strap to pin 42 “OP_LOW” (Output LOW)
Changed Table 14: ADD \ 1 \ bit \ 6:0 \ ID[x]: deleted Device
ID 7b'1101 00 (h'68). Only four (4) IDs will be available.
Changed Table 15: ADD \ 0 \ bit \ 6 \ OSS_SEL:
“OSS_SEL” changed feature to “OS_PCLK” (Output
Slew_PCLK). OSS_SEL moved to ADD \ 2 \ bit \ 6 \.
Changed Table 15: ADD \ 0 \ bit \ 5 \ RDS: changed “RDS”
feature to OS_DATA (Output Slew_DATA)
Changed Table 15: ADD \ 1\ bit \ 6:0 \ ID[x]: deleted Device
ID 7b'1110 00 (h'70). Only four (4) IDs will be available.
Changed Table 15: ADD \ 2 \ bit \ 7 \ Reserved: changed
“Reserved” to “OP_LOW”
Changed Table 15: ADD \ 2 \ bit \ 6 \ Reserved: changed
“Reserved” to “OSS_SEL”
Updated DS90UR905Q Typical Connection Diagram —
Pin Control. Ref 30102044
Updated DS90UR906Q Typical Connection Diagram —
Pin Control. Ref 30102045
Created OP_LOW timing figure 26. Ref 30102065.
Created OP_LOW timing figure27. Ref 30102066.
Removed IDDT3 and IDDIOT3 (RANDOM pattern)
because the limits are the same as checker board pattern.
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2/08/2010
Minor corrections: Changed Iin from +/-10uA to +/-15uA in
Serial Control bus section; added note 11 to: t
t
2/09/2010
Added “Note: During initial power-up, a delay of 10ms will
be required before the I2C will respond.” in Optional Serial
Bus Control description section.
2/11/2010
Removed Note 11 on t
3/5/2010
Added reference to soldering profile.
Added ESD CDM and ESD MM values.
Updated θ
5/25/2010
DS90UR906 DATASHEET LIMITS HAVE BEEN
UPDATED PER CHARACTERIZATION RESULTS
Corrected TABLE 14. SERIALIZER — Serial Bus Control
Registers: register 5 from RFB to VODSEL and register 4
from VODSEL to RFB.
8/9/2010
Modified order information to include NOPB designation in
NSPN column (replaced NSID column).
Corrected on Page 10. ESD Rating to IEC 61000–4–2
from ISO 10605 (duplication).
Added on Page 17. RPU = 10kΩ condition for the Serial
Control Bus Characteristics of tR and tF.
Removed ”Data Randomization & Scrambling”, Noise
Margin” and “Typical Performance Curves” sections.
1/13/2011
Modified ESD to include IEC condition (330 Ohm, 150pF).
Updated deserializer parameters: IDD1, IDDZ, IDDIOZ,
IDDR, VOH, VOL, tROS, tRDC.
Updated figures 14 and 15 to reflect data measurement at
VDDIO/2
Updated fig 35 — C13 changed to 4.7uF
PASS pin functional change (Tables 8 & 9, Fig 23 & 24)
SD
, t
DJIT
and VOL (in Serial Control Bus Characteristics).
JA
value.
DJIT
and max values.
XZR
, t
PLD
,