KDC5512HEVALZ Intersil, KDC5512HEVALZ Datasheet - Page 28

• Manufacturer Part Number: KDC5512HEVALZ
• Description: DAUGHTER CARD FOR KDC5512
• Manufacturer: Intersil

Specifications of KDC5512HEVALZ

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SPI Memory Map
ADDR
76-BF
03-07
26-5F
60-6F
(Hex)
11-1F
00
01
02
08
09
10
20
21
22
23
24
25
70
71
72
73
74
75
Device_Index_A
Output_Mode_A
Output_Mode_B
Offset_Coarse
PARAMETER
Gain_Medium
Config_Status
Chip_Version
Gain_Coarse
Port_Config
Offset_Fine
Phase_Slip
Burst_End
Gain_Fine
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Chip_Id
Modes
NAME
28
(MSB)
Active
BIT 7
SDO
other codes = reserved
Output Mode [2:0]
000 = Pin Control
001 = LVDS 2mA
010 = LVDS 3mA
100 = LVCMOS
clock_divide
1 = slow
0 = fast
Range
Result
BIT 6
XOR
LSB
First
DLL
Reserved
Reserved
TABLE 16. SPI MEMORY MAP
Reset
BIT 5
Soft
Reserved
KAD5512HP
Burst end address [7:0]
Reserved
(Note 13)
Enable
Result
BIT 4
DDR
XOR
Chip Version #
Coarse Offset
Medium Gain
Fine Offset
Reserved
Reserved
Reserved
Fine Gain
Reserved
Reserved
Reserved
Reserved
Chip ID #
BIT 3
Mirror
BIT 2
(bit5)
Power-Down Mode [2:0]
001 = Twos Complement
001 = Normal Operation
other codes = reserved
other codes = reserved
other codes = reserved
Coarse Gain
Output Format [2:0]
100 = Offset Binary
Clock Divide [2:0]
000 = Pin Control
000 = Pin Control
001 = Divide by 1
010 = Divide by 2
100 = Divide by 4
000 = Pin Control
010 = Gray Code
100 = Sleep
010 = Nap
ADC01
Mirror
BIT 1
(bit6)
ADC00
(LSB)
Mirror
Clock
BIT 0
Edge
(bit7)
Next
affected by
affected by
affected by
affected by
Soft Reset
Soft Reset
Read Only
Read only
Read only
cal. value
cal. value
cal. value
cal. value
cal. value
VALUE
Reset
Reset
(Hex)
DEF.
NOT
NOT
NOT
NOT
00h
00h
00h
00h
Soft
00h
00h
00h
00h
Soft
October 1, 2009
INDEXED/
GLOBAL
FN6808.3
G
G
G
G
G
G
G
G
G
I
I
I
I
I
I
I