ISL8206MEVAL1Z Intersil, ISL8206MEVAL1Z Datasheet - Page 11

• Manufacturer Part Number: ISL8206MEVAL1Z
• Description: EVAL BOARD 1 FOR ISL8206
• Manufacturer: Intersil

Specifications of ISL8206MEVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

add a small delay compared to the soft-start times. The
COMP/EN will continue to ramp to ~1V.
From T
the PVCC pin to exceed 6.5V (if rising up towards 12V),
so that the internal bias regulator can turn on cleanly. At
the same time, the ISET pin is initialized by disabling the
low-side gate driver and drawing I
through R
the I
for the OCP sample and hold operation (0.0ms to 3.4ms
nominal; the longer time occurs with the higher
overcurrent setting). The sample and hold operation uses
a digital counter and DAC to save the voltage, so the
stored value does not degrade, as long as the P
above V
page 12 for more details on the equations and variables).
Upon the completion of sample and hold at T
soft-start operation is initiated, and the output voltage
ramps up between T
FIGURE 18. I
FIGURE 19. I
SET
1
, there is a nominal 6.8ms delay, which allows
PORR
trip point. At T
T
T
SETI
0
0
3.4ms
(see “Overcurrent Protection (OCP)” on
. This sets up a voltage that will represent
COMP/EN
T
T
ISET
V
1
1
SET
SET
OUT
4
3.4ms
AND SOFT-START OPERATION
AND SOFT-START OPERATION
and T
2
, there is a variable time period
11
T
5
2
.
T
3
SET
START SWITCHING
T
(nominal 21.5µA)
4
COMP/EN
COMP/EN
ISL8204M, ISL8206M
3
, the
ISET
VOUT
VCC
V
ISET
T
OUT
5
is
Soft-Start and Pre-Biased Outputs
The soft-start internally ramps the reference on the
non-inverting terminal of the error amp from 0V to 0.6V
in a nominal 6.8ms. The output voltage will follow the
ramp from zero to it’s final value in the same 6.8ms (the
actual ramp seen on V
time), due to some initialization timing between T
T
The ramp is created digitally, so there will be 64 small
discrete steps. There is no simple way to change this
ramp rate externally.
After an initialization period (T
(COMP/EN pin) is enabled and begins to regulate the
converter's output voltage during soft-start. The
oscillator's triangular waveform is compared to the
ramping error amplifier voltage. This generates PHASE
pulses of increasing width that charge the output
capacitors. When the internally generated soft-start
voltage exceeds the reference voltage (0.6V), the
soft-start is complete and the output should be in
regulation at the expected voltage. This method provides
a rapid and controlled output voltage rise; there is no
large inrush current charging the output capacitors. The
entire start-up sequence from POR typically takes up to
17ms; up to 10.2ms for the delay and OCP sample and
6.8ms for the soft-start ramp.
Figure 20 shows the normal curve for start-up;
initialization begins at T
T
than the expected value (as shown Figure 21), neither
internal MOSFET will turn on until the soft-start ramp
voltage exceeds the output; V
ramping from there.
4
1
.
and T
2
. If the output is pre-biased to a voltage less
FIGURE 20. NORMAL START-UP
OUT
0
, and the output ramps between
will be less than the nominal
3
OUT
to T
starts seamlessly
4
), the error amplifier
December 16, 2010
3
FN6999.2
and