4032-T-B1_B_470 Silicon Laboratories Inc, 4032-T-B1_B_470 Datasheet - Page 16

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4032-T-B1_B_470

Manufacturer Part Number
4032-T-B1_B_470
Description
KIT DEV TEST EZRADIOPRO SI4032
Manufacturer
Silicon Laboratories Inc
Type
Transceiverr
Datasheets

Specifications of 4032-T-B1_B_470

Frequency
470MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
Si4032
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Si4030/31/32-B1
The SPI interface contains a burst read/write mode which allows for reading/writing sequential registers without
having to re-send the SPI address. When the nSEL bit is held low while continuing to send SCLK pulses, the SPI
interface will automatically increment the ADDR and read from/write to the next address. An example burst write
transaction is illustrated in Figure 3 and a burst read in Figure 4. As long as nSEL is held low, input data will be
latched into the Si4030/31/32 every eight SCLK cycles.
16
SDO
SCLK
nSEL
SCLK
nSEL
SDI
SDI
First Bit
First Bit
RW
RW
=1
=0
SDO
SCLK
nSEL
SDI
A6
A6
A5
A5
First Bit
A4
A4
RW
=0
A3
A3
A6
A2
A2
Figure 3. SPI Timing—Burst Write Mode
Figure 4. SPI Timing—Burst Read Mode
A5
Figure 2. SPI Timing—READ Mode
A1
A1
A4
First Bit
A0
A0
A3
D7
=X
D7
D7
=X
A2
D6 D5 D4 D3
D6
=X
D6
=X
A1
D5
=X
D5
=X
First Bit
A0
Rev 1.1
D4
=X
D4
=X
D7
D7
=X
D3
=X
D3
=X
D6 D5 D4 D3
D6
=X
D2
=X
D2
=X
D2 D1 D0
D5
=X
Last Bit
D1
=X
D1
=X
D4
=X
D0
=X
D0
=X
D3
=X
D7
=X
D7 D6 D5 D4 D3
D2
=X
D2 D1 D0
D6
=X
D1
=X
D5
=X
Last Bit
D0
=X
Last Bit
D4
=X
D3
=X
D2
=X
D2 D1 D0
D1
=X
Last Bit
D0
=X

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