4032-T-B1_B_470 Silicon Laboratories Inc, 4032-T-B1_B_470 Datasheet - Page 26

• Manufacturer Part Number: 4032-T-B1_B_470
• Description: KIT DEV TEST EZRADIOPRO SI4032
• Manufacturer: Silicon Laboratories Inc
• Type: Transceiverr

Specifications of 4032-T-B1_B_470

• Frequency: 470MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Si4032
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si4030/31/32-B1
3.5.5. Frequency Offset Adjustment
A frequency offset can be adjusted manually by fo[9:0] in registers 73h and 74h. The frequency offset adjustment is
implemented by shifting the Synthesizer Local Oscillator frequency. This register is a signed register so in order to
get a negative offset it is necessary to take the twos complement of the positive offset number. The offset can be
calculated by the following:
The adjustment range in high band is ±160 kHz and in low band it is ±80 kHz. For example to compute an offset of
+50 kHz in high band mode fo[9:0] should be set to 0A0h. For an offset of –50 kHz in high band mode the fo[9:0]
register should be set to 360h.
3.5.6. TX Data Rate Generator
The data rate is configurable between 0.123–256 kbps. For data rates below 30 kbps the ”txdtrtscale” bit in register
70h should be set to 1. When higher data rates are used this bit should be set to 0.
The TX date rate is determined by the following formula in kbps:
26
Add R/W Function/Description
Add R/W Function/Descript
6E
6F
73
74
R/W
R/W
R/W
R/W
Frequency Offset
Frequency Offset
TX Data Rate 1
TX Data Rate 0
ion
DesiredOff
fo[7]
txdr[15:0]
D7
txdr[15] txdr[14] txdr[13] txdr[12] txdr[11]
txdr[7]
D7
fo
DR_TX (kbps)
[
: 9
set
=
] 0
fo[6]
txdr[6]
D6

DR_TX(kbps) 2
--------------------------------------------------------------------------------------- -
D6

156
156
.
Rev 1.1
25
=
.
txdr[5]
DesiredOff
25
fo[5]
txdr 15:0
-------------------------------------------------- -
D5
Hz
D5
2
Hz
16

1 MHz

+


(
5
hbsel

txdr[4]
(
16
hbsel
txdtrtscale
D4
 1 MHz
+

fo[4]
5
set
D4


txdtrtscale

) 1
txdr[3]
) 1

D3
fo
fo[3]
[
D3
: 9
txdr[10]
txdr[2]
] 0
D2
fo[2]
D2
txdr[9]
txdr[1]
D1
fo[1]
fo[9]
D1
txdr[8]
txdr[0]
D0
fo[0]
fo[8]
D0
POR Def.
0Ah
AAh
POR
Def.
00h
00h