LIS331HHTR STMicroelectronics, LIS331HHTR Datasheet - Page 19
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LIS331HHTR
Manufacturer Part Number
LIS331HHTR
Description
ACCELEROMETER SENSOR 3AXIS 16-LG
Manufacturer
STMicroelectronics
Series
MEMS, nanor
Datasheet
1.STEVAL-MKI092V1.pdf
(37 pages)
Specifications of LIS331HHTR
Axis
X, Y, Z
Acceleration Range
±6g, 12g, 24g
Sensitivity
12mg/digit, 6mg/digit, 3mg/digit
Voltage - Supply
2.16 V ~ 3.6 V
Output Type
Digital
Bandwidth
50Hz ~ 1kHz Selectable
Interface
I²C, SPI
Mounting Type
Surface Mount
Package / Case
16-LGA
Package Type
LGA
Operating Supply Voltage (min)
2.16V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
3mm
Product Height (mm)
1mm
Product Length (mm)
3mm
Mounting
Surface Mount
Pin Count
16
Sensing Axis
X, Y, Z
Acceleration
6 g, 12 g, 24 g
Digital Output - Number Of Bits
16 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.16 V
Supply Current
10 uA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Digital Output - Bus Interface
I2C, SPI
Shutdown
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LIS331HHTR
Manufacturer:
APT
Quantity:
430
Part Number:
LIS331HHTR
Manufacturer:
ST
Quantity:
20 000
LIS331HH
Table 14.
5.2
Master
Slave
ST SAD+W
Table 12.
Table 13.
Transfer when Master is receiving (reading) multiple bytes of data from slave
Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number
of bytes transferred per transfer is unlimited. Data is transferred with the Most Significant bit
(MSb) first. If a receiver can’t receive another complete byte of data until it has performed
some other function, it can hold the clock line, SCL LOW to force the transmitter into a wait
state. Data transfer only continues when the receiver is ready for another byte and releases
the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it is not able to
receive because it is performing some real time function) the data line must be left HIGH by
the slave. The Master can then abort the transfer. A LOW to HIGH transition on the SDA line
while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be
terminated by the generation of a STOP (SP) condition.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-
address field. In other words, SUB(7) must be equal to 1 while SUB(6-0) represents the
address of first register to be read.
In the presented communication format MAK is Master acknowledge and NMAK is No
Master Acknowledge.
SPI bus interface
The LIS331HH SPI is a bus slave. The SPI allows to write and read the registers of the
device.
The Serial Interface interacts with the outside world with 4 wires: CS, SPC, SDI and SDO.
Master
Master
Slave
Slave
ST
SAK
ST
Transfer when master is writing multiple bytes to slave:
Transfer when master is receiving (reading) one byte of data from slave:
SAD + W
SUB
SAD + W
SAK
SAK
SR SAD+R
SAK
Doc ID 16366 Rev 1
SUB
SUB
SAK
SAK
SAK
SR
DATA
SAD + R
DATA
MAK
DATA
SAK
SAK
MAK
DATA
DATA
DATA
Digital interfaces
NMAK
SAK
NMAK
19/37
SP
SP
SP