TMC222-SI TRINAMIC, TMC222-SI Datasheet - Page 31

• Manufacturer Part Number: TMC222-SI
• Description: IC, MOTOR CTRL/DRVR, STEPPER, SOIC-20
• Manufacturer: TRINAMIC

Specifications of TMC222-SI

• Motor Type: Stepper
• No. Of Outputs: 4
• Output Current: 800mA
• Supply Voltage Range: 8V To 29V
• Driver Case Style: SOIC
• No. Of Pins: 20
• Operating Temperature Range: -40°C To +125°C
• Device Type: Motor
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TMC222 DATASHEET (V. 1.06 / March 15, 2007)
6.8.2
This command is provided to the circuit by the Master to get the actual position of the stepper-motor.
The position is provided by the circuit in 16-bit format, with the 3 LSBs at ‘0’ when in half stepping
mode (StepMode = “00”). Furthermore programmed target position and secure position are also
provided.
Byte
Note: N/A = not applicable
6.8.3
This command is provided to the circuit by the master to read the content of the OTP Memory. For
more information refer to Table 9: OTP Memory Structure on page 21.
Byte
Copyright © 2004-2007 TRINAMIC Motion Control GmbH & Co. KG
Byte
Byte
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
0
1
0
1
Target Position 1
Target Position 2
Actual Position 1
Actual Position 2
Slave Address
Secure Position
Secure Position
GetFullStatus2
Slave Address
GetOTPParam
OTP byte 0
OTP byte 1
OTP byte 2
OTP byte 3
OTP byte 4
OTP byte 5
OTP byte 6
OTP byte 7
GetOTPParam
GetFullStatus2
Slave Address
Slave Address
Content
Address
Content
Content
Content
N/A
bit 7
bit 7
bit 7
bit 7
1
1
1
1
1
1
0
1
1
GetOTPParam command (Response)
GetFullStatus2 command (Response)
bit 6
bit 6
GetFullStatus2 command
GetOTPParam command
1
1
1
0
bit 6
bit 6
1
0
1
1
1
OTP3
OTP3
bit 5
bit 5
1
0
OTP3
OTP3
bit 5
bit 5
0
1
1
OTP2
OTP2
bit 4
bit 4
TagPos(15:8)
OTP@0x00
OTP@0x01
OTP@0x02
OTP@0x03
OTP@0x04
OTP@0x05
OTP@0x06
OTP@0x07
OTP2
OTP3
ActPos(15:8)
OTP2
TagPos(7:0)
SecPos(7:0)
1
ActPos(7:0)
0
bit 4
bit 4
Structure
Structure
Structure
Structure
1
1
OTP1
OTP1
bit 3
bit 3
OTP1
OTP2
OTP1
bit 3
bit 3
1
0
1
1
OTP0
OTP0
OTP0
OTP1
OTP0
bit 2
bit 2
bit 2
bit 2
1
0
1
SecPos(10:8)
OTP0
bit 1
bit 1
HW
HW
bit 1
bit 1
HW
HW
0
1
1
bit 0
bit 0
bit 0
bit 0
HW
1
0
0
0
0
1
1
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