DSPIC30F5011-20I/PTG Microchip Technology, DSPIC30F5011-20I/PTG Datasheet - Page 152

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DSPIC30F5011-20I/PTG

Manufacturer Part Number
DSPIC30F5011-20I/PTG
Description
IC, DSC, 16BIT, 66KB, 40MHZ 5.5V TQFP-64
Manufacturer
Microchip Technology
Series
DsPIC30Fr
Datasheet

Specifications of DSPIC30F5011-20I/PTG

Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
52
Flash Memory Size
66KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
dsPIC30F5011/5013
20.8
The Peripheral Module Disable (PMD) registers pro-
vide a method to disable a peripheral module by stop-
ping all clock sources supplied to that module. When a
peripheral is disabled via the appropriate PMD control
bit, the peripheral is in a minimum power consumption
state. The control and status registers associated with
the peripheral will also be disabled so writes to those
registers will have no effect and read values will be
invalid.
A peripheral module will only be enabled if both the
associated bit in the PMD register is cleared and the
peripheral is supported by the specific dsPIC DSC vari-
ant. If the peripheral is present in the device, it is
enabled in the PMD register by default.
DS70116H-page 152
Note:
Peripheral Module Disable (PMD)
Registers
If a PMD bit is set, the corresponding mod-
ule is disabled after a delay of 1 instruction
cycle. Similarly, if a PMD bit is cleared, the
corresponding module is enabled after a
delay of 1 instruction cycle (assuming the
module control registers are already
configured to enable module operation).
20.9
When MPLAB
In-Circuit Debugging functionality is enabled. This
function allows simple debugging functions when used
with MPLAB IDE. When the device has this feature
enabled, some of the resources are not available for
general use. These resources include the first 80 bytes
of data RAM and two I/O pins.
One of four pairs of Debug I/O pins may be selected by
the user using configuration options in MPLAB IDE.
These
EMUD1/EMUC1,
EMUD3/EMUC3.
In each case, the selected EMUD pin is the Emula-
tion/Debug Data line, and the EMUC pin is the Emula-
tion/Debug Clock line. These pins will interface to the
MPLAB ICD 2 module available from Microchip. The
selected pair of Debug I/O pins is used by MPLAB
ICD 2 to send commands and receive responses, as
well as to send and receive data. To use the In-Circuit
Debugger function of the device, the design must
implement ICSP connections to MCLR, V
PGC, PGD, and the selected EMUDx/EMUCx pin pair.
This gives rise to two possibilities:
1.
2.
If EMUD/EMUC is selected as the Debug I/O pin
pair, then only a 5-pin interface is required, as
the EMUD and EMUC pin functions are multi-
plexed with the PGD and PGC pin functions in
all dsPIC30F devices.
If
EMUD3/EMUC3 is selected as the Debug I/O
pin pair, then a 7-pin interface is required, as the
EMUDx/EMUCx pin functions (x = 1, 2 or 3) are
not multiplexed with the PGD and PGC pin
functions.
In-Circuit Debugger
pin
EMUD1/EMUC1,
®
pairs
ICD2 is selected as a Debugger, the
are
© 2008 Microchip Technology Inc.
EMUD2/EMUC2
named
EMUD2/EMUC2
EMUD/EMUC,
DD
, V
or
and
SS
,

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